This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Fifo SCI Receive Interrupt in TMS320F28035

Hi,

I have 2 problems when using SCI:

My platform is "Multi-Axis DMC EVM - F28035".

Also, I need duplex transmission & interrupt driven & FIFO, the F28035 standard example code - "(ver.1.21) scia_loopback_interrupts" is adopted as my code base.

1. When 2400bps(BRR=3124, LSPCLK_DIV=0), or 115200bps(BRR=10, LSPCLK_DIV=3),  are set, the hyperterminal shows wrong characters.

But when I use 57600(12,5), it goes well.

2. The following code snippet is identical to, except where I marked "^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^" where I tried to disable TX, & disable loopback.

===> in order to see whether or not RX interrupts generates while I input characters via hyperterminal. ====> Of course, no RX interrupts generated.

Would anyone please help me to point out that where can I correct the mis-configurations to let it work.

Thanks a lot.

Ken.

 

 

 

 

#define CPU_FREQ    60E6
#define LSPCLK_FREQ CPU_FREQ/4
#define SCI_FREQ    100E3
#define SCI_PRD     (LSPCLK_FREQ/(SCI_FREQ*8))-1

// Prototype statements for functions found within this file.
interrupt void sciaTxFifoIsr(void);
interrupt void sciaRxFifoIsr(void);
interrupt void scibTxFifoIsr(void);
interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
void scib_fifo_init(void);
void error(void);

// Global variables
Uint16 sdataA[2];    // Send data for SCI-A
Uint16 rdataA[2];    // Received data for SCI-A
Uint16 rdata_pointA; // Used for checking the received data

void main(void)
{
   Uint16 i;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the DSP2803x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality
// This function is found in DSP2803x_Sci.c
   InitSciGpio();

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2803x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP2803x_DefaultIsr.c.
// This function is found in DSP2803x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW;  // This is needed to write to EALLOW protected registers
   PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
   PieVectTable.SCITXINTA = &sciaTxFifoIsr;

 

 //^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ added the following line, to set to 57600bps^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

SysCtrlRegs.LOSPCP.bit.LSPCLK=0x05;

//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 


   EDIS;   // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2803x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   scia_fifo_init();  // Init SCI-A

// Step 5. User specific code, enable interrupts:

// Init send data.  After each transmission this data
// will be updated for the next transmission
   for(i = 0; i<2; i++)
   {
      sdataA[i] = i;
   }

   rdata_pointA = sdataA[0];
// Enable interrupts required for this example
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1
   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2
   IER = 0x100; // Enable CPU INT
   EINT;

// Step 6. IDLE loop. Just sit and loop forever (optional):
    for(;;);

}

void error(void)
{
    asm("     ESTOP0"); // Test failed!! Stop!
    for (;;);
}

interrupt void sciaTxFifoIsr(void)
{
    Uint16 i;
    for(i=0; i< 2; i++)
    {
       SciaRegs.SCITXBUF=sdataA[i];     // Send data
    }

    for(i=0; i< 2; i++)                 //Increment send data for next cycle
    {
       sdataA[i] = (sdataA[i]+1) & 0x00FF;
    }

    SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;  // Clear SCI Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void sciaRxFifoIsr(void)
{
    Uint16 i;
    for(i=0;i<2;i++)
    {
       rdataA[i]=SciaRegs.SCIRXBUF.all;  // Read data
    }
    for(i=0;i<2;i++)                     // Check received data
    {
       if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) ) error();
    }
    rdata_pointA = (rdata_pointA+1) & 0x00FF;

    SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

void scia_fifo_init()
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE

 

//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ commented the following line, to turn off TX int ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
//   SciaRegs.SCICTL2.bit.TXINTENA =1;

//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 


   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   SciaRegs.SCIHBAUD = 0x0000;

 

 

//^^^^^^^^^^^^^^^^^^^^^^^use this line rather than the another to set to 57600bps^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 SciaRegs.SCILBAUD = 12;
///////////////   SciaRegs.SCILBAUD = SCI_PRD;

//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 

 

//^^^^^^^^^^^^^^^^^^^^^^^^^^ commented the following 2 lines, for turning off LOOPBACK ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
//   SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
//   SciaRegs.SCIFFTX.all=0xC022;

 //^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ added the following line, to turn off TX FIFO int ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

SciaRegs.SCIFFTX.all=0xC002;

//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 


   SciaRegs.SCIFFRX.all=0x0022;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;

}

 

 

 

  • Having had a second look at your code I think I have found your issue.  You enable the interrupts using RXBKINTENA.  However when using FIFOs you need to use SCIFFRX.bit.RXFFIENA simply because the other one does not work in FIFO mode.  See http://focus.ti.com/lit/ug/sprugh1c/sprugh1c.pdf Figure 10 for reference.

    Tim

  • Hi, Tim,

     

    Tim King said:

    Having had a second look at your code I think I have found your issue.  You enable the interrupts using RXBKINTENA.  However when using FIFOs you need to use SCIFFRX.bit.RXFFIENA simply because the other one does not work in FIFO mode.  See http://focus.ti.com/lit/ug/sprugh1c/sprugh1c.pdf Figure 10 for reference.

    Tim

    After checking this bit RXBKINTENA:

    When loopback is enabled, no matter RXBKINTENA is set or not, loopback works fine, both TX & RX ints are able to be triggered.

    But when the 2 bits, RXBKINTENA and loopback are disabled, the remaining settings unchanged(refer to the code, zip file I attached), TX works fine(interruptable), but RX doesn't(no interrupts).

    http://e2e.ti.com/support/microcontrollers/tms320c2000_32-bit_real-time_mcus/f/171/t/108289.aspx

     

    If RX int occurred - that I did encountered, but such situation is owing to the previous un-flushed data(under loopback mode).

    Please make sure that RX is triggered by new incoming data in normal / non-loopback mode.

    Thanks a lot for your suggestion.

    In another words, is there any configuration, which works fine on "Duplex, FIFO-4, interrupted mode" receiver / transmitter?

    Init() + Listening() + Hold() ?

    Thanks for help.

     

    Ken.

     

     

     

  • Ken Woo said:

    But when the 2 bits, RXBKINTENA and loopback are disabled, the remaining settings unchanged(refer to the code, zip file I attached), TX works fine(interruptable), but RX doesn't(no interrupts).

    After scanning your code (its a little messy in the setup) you do turn on RXFFIENA.  You also set the level to 4.  Now this level is the number of bytes that must be received (or number of bytes + 1, I can't remember off the top of my head) before an interrupt will be fired.  Are you inputting this many into the UART in testing it?  One way to initially test whether the interrupt is working is to set the level to 0.  This will fire an interrupt every RX char.  It may not be what you want in the end but it is good for testing.

    Init() + Listening() + Hold() ?

    Not quite exactly sure what you mean by listening and hold.


    Tim

     

  •  

    Hi, Tim,

    Appreciates for your kindly help.

    Now I found the root-cause that is ME.

    I'm embarrassed that I neglected the more fundamental place to examine.

    After tracing the wiring of the SCI-part circuit, as well as using scope to debug, I found the facts:

    1. The SW1 on the control card, which is used to select the SCI-rx connected, or GPIO-28.

    2. FTDI chip supports the same SCI channel utilizing virtual-COM-port-via-USB and routes to this channel.

    3. Another COM-port connector is on-board, too, which is again the same SCI channel.

    Therefore, if something above are incorrectly configured, then for example, the SCI-RX on F28035 may be signaled however, the driven strength might be weak.

    So, the configurations are as follows:

    A. When using com-port connector on board, SW1 be on, the route of FTDI-to-SCI-RX be opened (i.e., J4 is opened).

    B. When using FTDI SCI function, SW1 be off, FTDI-to-SCI-RX be closed.

     

    Thanks again for your help.

     

    Ken.