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on TDA4, we are using EPWM peripheral with sync input function, we can synchronize EPWM output with other input signal. it's working perfect in most of time. other input signal connect to EPWMxSYNCI.
Here is the setting of EPWM .
TBCLK set to 1 MHz, count-down mode for counter, count-down mode after sync. TB module output frequency is 27Hz, set output to high when Counter equals CMPB on down-count, Clear Low when CNT_zero happen.
My question is .
between EPWMxSYNCI and CNT_zero, which signal has higher priority when they happen at same time?
happen at same time means EPWMxSYNCI rising edge early than CNT_zero , and time difference less than 1uS, because sample rate is TBCLK ( 1 MHz). so both of them will be sample by TBCLK edge in same cycle. it seems that CNT_zero has higher priority from my observation.
EPWMxSYNCI will load TBPHS to TBCNT, CNT_zero will load TBPRD to TBCNT. they have different result.
Private E2E
