TMS320F28379D: ePWM Glitches on Falling Edge

Hi Braden,

Are you changing any parameters during the execution of your program, such as the period, CMPA, AQ settings? If not, could you please share your initialization code? It makes it easier for us to duplicate your configuration and test. 

Best Regards,

Marlyn

Hi Marlyn,

I am not changing any settings once the PWM is initialized and started. Below is my initialization code:

// Up count
gEPwmPhaseARef->TimeBaseCtrl.bit.CounterMode = 0;

// Set cycle freq to 20KHz
gEPwmPhaseARef->TimeBaseCtrl.bit.TbClkDiv = 0;
gEPwmPhaseARef->TimeBaseCtrl.bit.HsTbClkDiv = 0;
gEPwmPhaseARef->TimeBasePeriod.bit.Period = 2499;

// Shadow load on period event
gEPwmPhaseARef->CountCompCtrl.bit.ShadowAMode = false;
gEPwmPhaseARef->CountCompCtrl.bit.LoadAMode = 1;
gEPwmPhaseARef->CountCompCtrl.bit.LoadASync = 0;

// Set duty cycle to 50%
gEPwmPhaseARef->CountCompA.bit.Comp = 1249;

// Set low on comparator A up count period event / Set high on zero event
gEPwmPhaseARef->ActionQualACtrl.bit.CompAUp = 1;
gEPwmPhaseARef->ActionQualACtrl.bit.Zero = 2;

// Reset the count and phase direction
gEPwmPhaseARef->TimeBaseCtrl.bit.PhaseDir = 0;
gEPwmPhaseARef->TimeBaseCtrl.bit.CounterMode = 0;

gEPwmPhaseARef->TimeBaseCount.bit.Count = 0;

// Enable EnableEpwmTbClock
EPwmModule::InitializationFinished();

Also, if I enable a complementary pair using PWM1 channel A with a deadband of 400nS, I see what appears to be some noise being propagated between the two output channels. Every rising edge of one PWM signal causes a 4 - 8nS glitch on the opposite channel as shown. 

Here is my initialization code for this condition:

// Up count
gEPwmPhaseARef->TimeBaseCtrl.bit.CounterMode = 0;

// Set cycle freq to 20KHz
gEPwmPhaseARef->TimeBaseCtrl.bit.TbClkDiv = 0;
gEPwmPhaseARef->TimeBaseCtrl.bit.HsTbClkDiv = 0;
gEPwmPhaseARef->TimeBasePeriod.bit.Period = 2499;

// Shadow load on period event
gEPwmPhaseARef->CountCompCtrl.bit.ShadowAMode = false;
gEPwmPhaseARef->CountCompCtrl.bit.LoadAMode = 1;
gEPwmPhaseARef->CountCompCtrl.bit.LoadASync = 0;

// Set duty cycle to 50%
gEPwmPhaseARef->CountCompA.bit.Comp = 1249;

// Set low on comparator A up count period event / Set high on zero event
gEPwmPhaseARef->ActionQualACtrl.bit.CompAUp = 1;
gEPwmPhaseARef->ActionQualACtrl.bit.Zero = 2;

// Reset the count and phase direction
gEPwmPhaseARef->TimeBaseCtrl.bit.PhaseDir = 0;
gEPwmPhaseARef->TimeBaseCtrl.bit.CounterMode = 0;

gEPwmPhaseARef->TimeBaseCount.bit.Count = 0;

// Force channel B off
gEPwmPhaseARef->ActionQualContSoftForce.bit.ContSoftForceB = 1;

// Deadband shadow load mode on period
gEPwmPhaseARef->DeadBandCtrl2.bit.ShadowBCtrlMode = true;
gEPwmPhaseARef->DeadBandCtrl2.bit.LoadBCtrlMode = 1;

gEPwmPhaseARef->DeadBandCtrl.bit.ShadowFedMode = false;
gEPwmPhaseARef->DeadBandCtrl.bit.LoadFedMode = 1;

gEPwmPhaseARef->DeadBandCtrl.bit.ShadowRedMode = true;
gEPwmPhaseARef->DeadBandCtrl.bit.LoadRedMode = 1;

// Set deaband to 400nS
gEPwmPhaseARef->DeadBandRed.bit.Delay = 20;
gEPwmPhaseARef->DeadBandFed.bit.Delay = 20;

// Output complementary pair on Channel A / B
gEPwmPhaseARef->DeadBandCtrl.bit.InputMode = 0;
gEPwmPhaseARef->DeadBandCtrl.bit.OutputMode = 3;
gEPwmPhaseARef->DeadBandCtrl.bit.OutputSwap = 0;
gEPwmPhaseARef->DeadBandCtrl.bit.PolaritySel = 2;

// Enable EnableEpwmTbClock
EPwmModule::InitializationFinished();

If it helps, the blue path shown below is the configuration I have the deadband submodule in based on the above initialization code.

Are these just an artifact of PWM signals routed next to each other and I'll need to filter out in hardware? Or is this an issue in software?

Thanks!

Hi Braden,

I don't see anything wrong with how you have setup the software. I even ran your exact configuration and I didn't see any issues:

Correct frequency, no glitches

Closer view for 400nsec deadband

Code I used:

    EPwm1Regs.TBPRD = 2499;
    EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;
    EPwm1Regs.TBCTR = 0x0000;

    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    EPwm1Regs.CMPA.bit.CMPA = 1249;

    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
    EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR;
    EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;

    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBRED.bit.DBRED = 20;
    EPwm1Regs.DBFED.bit.DBFED = 20;

I would check to see if this is a hardware issue. If you can, probe the pin coming out of the device.

Best Regards,

Marlyn