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Tool/software:
Hi experts,
I'm planning to use CMPSS module and ePWM module to realize one kind of current control, but I found out there's difference between waves generated by different triggering source. Here's the thing:
Constant ePWM settings:
EPwm1REGS.TBPRD = 0xFFFF;
EPwm1REGS.TBCTL.BIT.CTRMODE = TB_COUNT_DOWN;
If I configure ePWM's AQ submodule as following:
EPwm1REGS.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1REGS.AQCTLA.bit.ZRO = AQ_SET;
EPwm1REGS.CMPA.bit.CMPA = 0x7FFF;
The waveform of ePWM1A would be this:
But if I set the T1 event and T2 event as following:
EPwm1REGS.DCTRIPSEL.bit.DCAHCOMPSEL = 0x6; //CMPSS1.CTRIPH --> TRIPIN7 --> DCTRIP.A.HIGH
EPwm1REGS.DCTRIPSEL.bit.DCBHCOMPSEL = 0x7; //CMPSS1.CTRIPL --> TRIPIN8 --> DCTRIP.B.HIGH
EPwm1REGS.TZDCSEL.bit.DCAEVT1 = 0B010; //DCAH = high, DCAL = don't care
EPwm1REGS.TZDCSEL.bit.DCBEVT1 = 0B010; //DCBH = high, DCBL = don't care
EPwm1REGS.AQTSRCSEL.bit.T1SEL = 0x0; //0000: DCAEVT1
EPwm1REGS.AQTSRCSEL.bit.T2SEL = 0x2; //0010: DCBEVT1
EPwm1REGS.AQCTLA2.bit.T1D = AQ_CLEAR;
EPwm1REGS.AQCTLA2.bit.T2D = AQ_SET;
and I manually invert the CMPSS1 H&L's output in a 4khz adc_isr() by running 2 code groups in turn:
group 1:
Cmpss1Regs.COMPCTL.bit.COMPLINV = 0;
Cmpss1Regs.COMPCTL.bit.COMPHINV = 1;
group 2:
Cmpss1Regs.COMPCTL.bit.COMPLINV = 1;
Cmpss1Regs.COMPCTL.bit.COMPHINV = 0;
the waveform of ePWM1A is similar to the image above theoretically, but it's like that:
Seems it's high impedance when changing to AQ_CLEAR so I change EPwm1REGS.AQCTLA2.bit.T1D to AQ_TOGGLE, but the falling edge is still like that.
So how can I make the falling edge drop immediately (just like the former image) in this situation(the rising & falling edge must trigged by CMPSS output signals)?
Hi Harley,
This issue occurs when the TZ settings not being set to "disable action" since by default it is configured for high impedance.
Can you make sure you set the TZCTL registers to disable action on all the events if you're not using them? This will remove this slope.
Best,
Ryan Ma
Hi Ryan,
I set TZCTL to 0xFFFF and it's OK now, but I have disabled all in TZSEL register. Dose that mean as long as I use a DCxEVT whether to trig TZ or not , the DCxEVT.force signal will be inevitably sent to TZ?
Yes, using the T1/T2 event, will be inevitably sent to TZ.
I have filed a JIRA ticket to have this noted.
Best,
Ryan Ma