TMS320F280039C: When set 65535 to TZCLR register, the TZCLR.CBCPULSE would set as 0x03, why not 0x0?

Hi Champs,

I am asking for my customer here! Thanks~

Here are the below code.

EPWM_setTripZoneAction(EPWM1_BASE, EPWM_TZ_ACTION_EVENT_TZA, EPWM_TZ_ACTION_LOW); //
EPWM_setTripZoneAction(EPWM1_BASE, EPWM_TZ_ACTION_EVENT_TZB, EPWM_TZ_ACTION_LOW); //

//Trip4 will be active if CMPSSL & CMPSSH is active
EPWM_selectDigitalCompareTripInput(EPWM1_BASE, EPWM_DC_TRIP_TRIPIN4, EPWM_DC_TYPE_DCBH); //DCBEVT2
EPWM_setTripZoneDigitalCompareEventCondition(EPWM1_BASE, EPWM_TZ_DC_OUTPUT_B2, EPWM_TZ_EVENT_DCXH_HIGH); //
EPWM_setDigitalCompareEventSource(EPWM1_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);//
EPWM_selectCycleByCycleTripZoneClearEvent(EPWM1_BASE, EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO); //

//Enable the following trips. Add Emu stop.
EPWM_enableTripZoneSignals(EPWM1_BASE, EPWM_TZ_SIGNAL_DCBEVT2);

// Clear any spurious trip
EPWM_clearTripZoneFlag(EPWM1_BASE, (EPWM_TZ_FLAG_OST |EPWM_TZ_FLAG_CBC | EPWM_TZ_FLAG_DCBEVT2 | EPWM_TZ_OST_FLAG_DCBEVT1)); //EPWM_TZ_FLAG_DCAEVT2 |

#1. Trip occurs, Debug with the normal conditions, not write the 65535 to TZCLR. it works normally

#2. Trip occurs, Debug with the conditions, write the 65535 to TZCLR. And then TZCLR.CBCPULSE would set as 0x03, so it would not clear automatically.

So it would not CBC protection as show below 

The customer is confused. Using 65535 to clear the TZCLR register will affect the value of the high bit/TZCLR.CBCPULSE? Thanks a lot!