Other Parts Discussed in Thread: SYSCONFIG
Hello,
I am studying how this TI micronctroller works and I am having problems understanding how the FIFO feature functions when trying to setting an SPI communication.
I am interfacing the 2 SPI interface of my launchpad and I would like to transfer an array of 8 elements of uint16_t type using the FIFO interrupts from the master (controller) to the slave (peripheral). My configuration and code are the following (I am using sysconfig):
// Included Files /************************************************************************/
#include "driverlib.h"
#include "device.h"
#include "board.h"
#include "c2000ware_libraries.h"
/******************************************************************************************/
// Defines /*******************************************************************************/
/******************************************************************************************/
// Prototypes /****************************************************************************/
__interrupt void INT_mySPI0_TX_ISR();
__interrupt void INT_mySPI1_RX_ISR();
__interrupt void INT_mySPI0_RX_ISR();
__interrupt void INT_mySPI1_TX_ISR();
/******************************************************************************************/
// Global Variables /**********************************************************************/
uint16_t dim = 8;
uint16_t rx_B[8];
uint16_t tx_A[8];
uint16_t tracker = 0;
/******************************************************************************************/
// Main /**********************************************************************************/
void main(void)
{
// Local Variable
uint16_t i;
// Initialization of data
for(i = 0; i < dim; i++)
{
tx_A[i] = i;
rx_B[i]= 0;
}
// Initialize device clock and peripherals
Device_init();
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
Interrupt_initModule();
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
Interrupt_initVectorTable();
// PinMux and Peripheral Initialization
Board_init();
// Enable Global Interrupt (INTM) and real time interrupt (DBGM)
EINT;
ERTM;
// Infinite Loop
while(1)
{
}
}
/******************************************************************************************/
// Interrupts /****************************************************************************/
__interrupt void INT_mySPI0_TX_ISR(){
// Local Variable
uint16_t i;
// TX
for(i=0;i<dim;i++){
SPI_writeDataBlockingFIFO(mySPI0_BASE, tx_A[i]);
}
// Update Data
for(i=0;i<dim;i++){
tx_A[i] += 1;
}
// Clear Interrupt
SPI_clearInterruptStatus(mySPI0_BASE, SPI_INT_TXFF);
Interrupt_clearACKGroup(INT_mySPI0_TX_INTERRUPT_ACK_GROUP);
}
__interrupt void INT_mySPI1_RX_ISR(){
// Local Variable
uint16_t i;
// TX
for(i=0;i<dim;i++){
rx_B[i] = SPI_readDataBlockingFIFO(mySPI1_BASE);
}
// Check
for(i=0;i<dim;i++){
if(rx_B[i] != (tracker + i)){
ESTOP0;
}
}
// Update tracker
tracker ++;
// Clear Interrupt
SPI_clearInterruptStatus(mySPI1_BASE, SPI_INT_RXFF);
Interrupt_clearACKGroup(INT_mySPI1_RX_INTERRUPT_ACK_GROUP);
}
__interrupt void INT_mySPI1_TX_ISR(){
}
__interrupt void INT_mySPI0_RX_ISR(){
}
/******************************************************************************************/
// End of File
I hope the code is clear (it kinda follows the examples spi_ex4 drivelib example). I am calling a TX ISR where I write all the data using the command WriteDataBlockingFIFO and then, after transmitting, I update by one each element of the buffer. Then in the RX ISR I want to read all the data I sent (using ReadDataBlockingFIFO) and save it in an array of the same dimensions of the one I sent, then I check that the elements I received are the expected ones using the "tracker" variable.


I have set a bit rate of 10MHz because I am also trying to achieve a fast communication for a future project.

(the names of the interrupts ISR follow the first one in the last image)
What I am expecting is that the interrupts are triggered as follows:
- TX ISR is triggered when 8/16 places are occupied in the TX FIFO since I set that the SPI0 (controller) "Transmitt Interrrupt Level" on "8/16 FIFO";
- RX ISR is triggered when 8/16 places are free in the RX FIFO since I set that the SPI1 (peripheral) "Receive Interrrupt Level" on "8/16 FIFO".
The results I get when I debug are that only the TX ISR is triggered while the RX ISR nevers kicks in. I have read the reference manual section of the SPI but I don't know where I am doing wrong. I attach a picture of my debug perspective:

I don't know if I have misunderstood how the interrupts are called, or the read and write functions I am using in the code, or even just the code-flow of the protocol. Could you please help me understand where I am wrong and how FIFO buffers work?
Thank you in advance .
Best regards,
Edoardo

