TMS320F28335: PID Simulation Digital Control Library (DCL)

I suggest first removing the include folders I've marked in the picture below. They are not valid for your new device and I'm guessing is causing many compile and link problems:

Hi Kier,

Thanks for your reply. Still having same errors after removing those marked include files. See attached picture.

Please suggest.

Thanks

Regards

Arsalan

It seems the code from F28069 is not compatible with the register definitions of F28335. Maybe they don't have the same ADC silicon and so on.

Perhaps a better starting point is to find a working ADC example for your class of device (Example_2833xAdcSoc) then cut and paste the PID control code and add in the DCL library etc.

Hi Arsalan,

I tried to replicate the issue and I can confirm with Kier that there're naming difference in terms of ADC setup between F28335 and F28069. To name a few, ADCINT1 named in F28069 is just named ADCINT in F28335. Therefore I suggest going through each of the ADC definition files (DSP2833x_Adc.h and F2807x_Adc.h) to pinpoint the difference in naming convention. The example you used (2833xEPwmUpDownAQ) is also missing the DSP2833_Adc.c file so perhaps like what Kier suggests, ADC examples might be a better starting point to conduct the porting activity.

The statement "note: declaration may not appear after executable statement in block" is just a warning that seemingly trying to follow a C90 standard which forbids mixing declaration and code. Regardless it compiles just fine after getting rid of the other error statements. I've contacted our internal expert regarding this and will get back to you once I received an update.

Best,

Sen Wang

Hi Kier & Sen Wang,

Before including PID setup in ADC, I just import the Example_2833xAdcSoc and then build the Project. I found some errors. I will include the PID code later in this example. Please help to resolve this errors in Example_2833xAdcSoc.

the code is here:

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]	- Last 10 ADCRESULT0 values
//! - Voltage2[10]	- Last 10 ADCRESULT1 values
//! - ConversionCount	- Current result number 0-9
//! - LoopCount		- Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

//
// Function Prototypes
//
__interrupt void adc_isr(void);

//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];

//
// Main
//
void main(void)
{
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
    
    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;
    
    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;	// Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;	// count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

//
// adc_isr - 
//
__interrupt void  
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Please suggest accordingly.

Thanks

Arsalan

I get the archive warning but not the errors in the Problems window. It's strange because you generate an output file regardless of the error. You may be able to debug the .out file anyway.

Do any of the examples compile without error?

This looks like a problem for TI to tackle. Sorry I can't be more helpful.

Hi

Thanks Kier, Yes I simulated my EPWM program before using EPWMupdownAq example which gives only warning but no errors. and it worked as well on the board which i tested before.

Any TI members can help or suggest me to resolve this error in the problem window.

Other TI members and experts .... 

Three lines which build errors in the code:

IER = 0x0000;
IFR = 0x0000;

IER |= M_INT1;      // Enable CPU Interrupt 1

The code is here:

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]	- Last 10 ADCRESULT0 values
//! - Voltage2[10]	- Last 10 ADCRESULT1 values
//! - ConversionCount	- Current result number 0-9
//! - LoopCount		- Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

//
// Function Prototypes
//
__interrupt void adc_isr(void);

//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];

//
// Main
//
void main(void)
{
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
    
    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;
    
    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;	// Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;	// count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

//
// adc_isr - 
//
__interrupt void  
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Regards

Arsalan

Hi Arsalan,

Oddly enough when I tried to replicate your problem I couldn't obtain the error. Both IER and IFR are a definition in DSP2833x_Device.h, which should be under your Includes -> C2000WareRepo/device_support/f2833x/headers/include, please double check to see if this file exists and build it again. Your console output seems to built it just fine. 

Speaking of the "warning: cannot resolve archive" , while it isn't necessary, one way to fix it is by changing the library name from "rts2800_fpu32_fast_supplement.lib" to "rts2800_fpu32_fast_supplement_coff.lib" for the COFF version. The following window can be found under Project Properties>Build>C2000 Linker> File Search Path

HI Seng & Kier,

Thanks for your replies. The problem has been resolved now. There might be bug in CCS. I deleted the workspace, then again import the files and then this Example_2833xAdcSoc is working with no errors.

Now I am going to check first on Hardware the same program and then i will add PID code as Kier said in previous post.

Thanks

Regards

Arsalan 

Hi Seng & Kier,

I have just checked on the hardware. The Example_2833xAdcSoc is running on the board. Changing analog values from 0-3V at AN02 & AN03 give change in Voltage1[10 bit] and Voltage2[10 bit] in terms Digital value. See picture below

Now I am going to add PID code from F28069_PID example into this code (F28335 ADC_SOC) as Kier said in previous post. I will get back soon for PID simulation.

Thanks

Regards

Arsalan 

Hi Seng & Kier,

I have just checked on the hardware. The Example_2833xAdcSoc is running on the board. Changing analog values from 0-3V at AN02 & AN03 give change in Voltage1[10 bit] and Voltage2[10 bit] in terms Digital value. See picture below

Now I am going to add PID code from F28069_PID example into this code (F28335 ADC_SOC) as Kier said in previous post. I will get back soon for PID simulation.

Thanks

Regards

Hi Kier & Sen & TI Community,

As I explained you before that I am working on F28335 card and I have only F28069 code example for PID simulation. As per your suggestion, I ran the Example_2833xAdcSoc first on Hardware which is working fine. Now I copied the PID part of the code(from F28069) in this example. But I have several errors to resolve. Please suggest this to resolve the errors accordingly.

The combine code is attached here:

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]  - Last 10 ADCRESULT0 values
//! - Voltage2[10]  - Last 10 ADCRESULT1 values
//! - ConversionCount   - Current result number 0-9
//! - LoopCount     - Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833x_GlobalPrototypes.h"
#include "DCLF32.h"
//
// Function Prototypes
//
__interrupt void adc_isr(void);

//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];
float rk = 0.25f;
float yk;
float lk;
float uk;
DCL_PID pid1 = PID_DEFAULTS;
float Duty;
float upperlim = 0.95f;
float lowerlim = 0.05f;
unsigned int clampactive;

//
// Main
//
void main(void)
{
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //* configure ePWM1 */
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;
    InitEPwm();								// [F2806x_EPwm.c]
    EPwm1Regs.TBCTL.bit.CTRMODE = 3;		// freeze TB counter
    EPwm1Regs.TBCTL.bit.PRDLD = 1;  		// immediate load
    EPwm1Regs.TBCTL.bit.PHSEN = 0;	   		// disable phase loading
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;		// disable SYNCOUT signal
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;		// TBCLK = SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;			// clock divider = /1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;		// free run on emulation suspend
    EPwm1Regs.TBPRD = 0x2328;	          	// set period for ePWM1 (0x2328 = 10kHz)
    EPwm1Regs.TBPHS.all = 0;			    // time-base Phase Register
    EPwm1Regs.TBCTR = 0;					// time-base Counter Register
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;        	// enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 1;       	// select SOC from zero match
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;        	// generate pulse on 1st event
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;		// enable shadow mode
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 2; 	// reload on CTR=zero
    EPwm1Regs.CMPA.half.CMPA = 0x0080;	 	// set compare A value
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;		// HIGH on CMPA up match
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;	// LOW on zero match
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.

    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;  // Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;    // count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

/* initialise controller variables */
	pid1.Kp = 9.0f;
	pid1.Ki = 0.015f;
	pid1.Kd = 0.35f;
	pid1.Kr = 1.0f;
	pid1.c1 = 188.0296600613396f;
	pid1.c2 = 0.880296600613396f;
	pid1.d2 = 0.0f;
	pid1.d3 = 0.0f;
	pid1.i10 = 0.0f;
	pid1.i14 = 1.0f;
	pid1.Umax = 1.0f;
	pid1.Umin = -1.0f;

	rk = 0.25f;								// initial value for control reference
	lk = 1.0f;								// control loop not saturated

//
// adc_isr -
//
__interrupt void
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    // read ADC channel
    yk = ((float) AdcRegs.ADCRESULT0 - 2048.0f) / 2047.0f;

    // run PID controller
    uk = DCL_runPID_C4(&pid1, rk, yk, lk);
	
    // external clamp for anti-windup reset
    clampactive = DCL_runClamp_C1(&uk, upperlim, lowerlim);
    lk = (clampactive == 0U) ? 1.0f : 0.0f;

    // write u(k) to PWM
    Duty = (uk / 2.0f + 0.5f) * (float) EPwm1Regs.TBPRD;
    EPwm1Regs.CMPA.half.CMPA = (Uint16) Duty;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Console window file having errors:>

**** Build of configuration Debug for project Example_2833xAdcSoc ****

"C:\\ti\\ccs1220\\ccs\\utils\\bin\\gmake" -k all 
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_ADC_cal.asm"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_ADC_cal.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_ADC_cal.asm"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_ADC_cal.asm"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_Adc.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_Adc.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_Adc.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_Adc.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_CodeStartBranch.asm"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_CodeStartBranch.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_CodeStartBranch.asm"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_CodeStartBranch.asm"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_DefaultIsr.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_DefaultIsr.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_DefaultIsr.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_DefaultIsr.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/source/DSP2833x_GlobalVariableDefs.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_GlobalVariableDefs.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/source/DSP2833x_GlobalVariableDefs.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/source/DSP2833x_GlobalVariableDefs.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieCtrl.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_PieCtrl.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieCtrl.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieCtrl.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieVect.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_PieVect.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieVect.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_PieVect.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_SysCtrl.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_SysCtrl.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_SysCtrl.c"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_SysCtrl.c"
 
Building file: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_usDelay.asm"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="DSP2833x_usDelay.d_raw"  "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_usDelay.asm"
Finished building: "C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/source/DSP2833x_usDelay.asm"
 
Building file: "../Example_2833xAdcSoc.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --float_support=fpu32 --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/headers/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2833x/common/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/IQmath/c28/include" --include_path="C:/ti/c2000/C2000Ware_4_03_00_00/libraries/math/FPUfastRTS/c28/include" --define="_DEBUG" --define="LARGE_MODEL" -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="Example_2833xAdcSoc.d_raw"  "../Example_2833xAdcSoc.c"
 
>> Compilation failure
subdir_rules.mk:72: recipe for target 'Example_2833xAdcSoc.obj' failed
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 216: note: declaration may not appear after executable
          statement in block
      float32_t beta1 = -(float32_t) crealf(q->z1 + q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 217: note: declaration may not appear after executable
          statement in block
      float32_t beta0 = (float32_t) crealf(q->z1 * q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 218: note: declaration may not appear after executable
          statement in block
      float32_t alpha1 = -(float32_t) crealf(q->p1 + q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 219: note: declaration may not appear after executable
          statement in block
      float32_t alpha0 = (float32_t) crealf(q->p1 * q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 220: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 221: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 4.0f + (alpha1 * 2.0f * T) + (alpha0 * T * T);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 222: note: declaration may not appear after executable
          statement in block
      float32_t b0 = q->K * (4.0f + (beta1 * 2.0f * T) + (beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 223: note: declaration may not appear after executable
          statement in block
      float32_t b1 = q->K * (-8.0f + (2.0f * beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 224: note: declaration may not appear after executable
          statement in block
      float32_t b2 = q->K * (4.0f - (beta1 * 2.0f * T) + (beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 225: note: declaration may not appear after executable
          statement in block
      float32_t a2 = (4.0f - (alpha1 * 2.0f * T) + (alpha0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 226: note: declaration may not appear after executable
          statement in block
      float32_t c2 = -a2;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 227: note: declaration may not appear after executable
          statement in block
      float32_t tau = (p->css->T / 2.0f) * (1.0f - c2) / (1.0f + c2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 230: note: declaration may not appear after executable
          statement in block
      float32_t det = (c2 + 1.0f);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 240: note: declaration may not appear after executable
          statement in block
      float32_t k1 = (c2*b0 - b1 - (2.0f + c2)*b2) / det;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 241: note: declaration may not appear after executable
          statement in block
      float32_t k2 = (c2 + 1.0f) * (b0 + b1 + b2) / det;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 242: note: declaration may not appear after executable
          statement in block
      float32_t k3 = (c2*c2*b0 - c2*b1 + b2) / det;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 275: note: declaration may not appear after executable
          statement in block
      float32_t beta1 = -(float32_t) crealf(q->z1 + q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 276: note: declaration may not appear after executable
          statement in block
      float32_t beta0 = (float32_t) crealf(q->z1 * q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 277: note: declaration may not appear after executable
          statement in block
      float32_t alpha1 = -(float32_t) crealf(q->p1 + q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 278: note: declaration may not appear after executable
          statement in block
      float32_t alpha0 = (float32_t) crealf(q->p1 * q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 279: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 280: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 4.0f + (alpha1 * 2.0f * T) + (alpha0 * T * T);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 281: note: declaration may not appear after executable
          statement in block
      float32_t b0 = q->K * (4.0f + (beta1 * 2.0f * T) + (beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 282: note: declaration may not appear after executable
          statement in block
      float32_t b1 = q->K * (-8.0f + (2.0f * beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 283: note: declaration may not appear after executable
          statement in block
      float32_t b2 = q->K * (4.0f - (beta1 * 2.0f * T) + (beta0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 284: note: declaration may not appear after executable
          statement in block
      float32_t a2 = (4.0f - (alpha1 * 2.0f * T) + (alpha0 * T * T)) / a0p;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 285: note: declaration may not appear after executable
          statement in block
      float32_t c2 = -a2;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 286: note: declaration may not appear after executable
          statement in block
      float32_t tau = (p->css->T / 2.0f) * (1.0f - c2) / (1.0f + c2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 289: note: declaration may not appear after executable
          statement in block
      float32_t det = (c2 + 1.0f);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 513: note: declaration may not appear after executable
          statement in block
      float32_t z1 = (float32_t) crealf(q->z1);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 514: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 539: note: declaration may not appear after executable
          statement in block
      float32_t z1 = (float32_t) crealf(q->z1);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 540: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 912: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 2.0f - (float32_t) crealf(q->p1) * p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1094: note: declaration may not appear after executable
          statement in block
      float32_t beta2 = -(float32_t) crealf(q->z1 + q->z2 + q->z3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1095: note: declaration may not appear after executable
          statement in block
      float32_t beta1 = (float32_t) crealf((q->z1 * q->z2) + (q->z2 * q->z3) + (q->z1 * q->z3));
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1096: note: declaration may not appear after executable
          statement in block
      float32_t beta0 = -(float32_t) crealf(q->z1 * q->z2 * q->z3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1098: note: declaration may not appear after executable
          statement in block
      float32_t alpha2 = -(float32_t) crealf(q->p1 + q->p2 + q->p3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1099: note: declaration may not appear after executable
          statement in block
      float32_t alpha1 = (float32_t) crealf((q->p1 * q->p2) + (q->p2 * q->p3) + (q->p1 * q->p3));
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1100: note: declaration may not appear after executable
          statement in block
      float32_t alpha0 = -(float32_t) crealf(q->p1 * q->p2 * q->p3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1102: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1104: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 8.0f + (alpha2 * 4.0f * T) + (alpha1 * 2.0f * T * T) + (alpha0 * T * T * T);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1306: note: declaration may not appear after executable
          statement in block
      float32_t beta1 = -(float32_t) crealf(q->z1 + q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1307: note: declaration may not appear after executable
          statement in block
      float32_t beta0 = (float32_t) crealf(q->z1 * q->z2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1308: note: declaration may not appear after executable
          statement in block
      float32_t alpha1 = -(float32_t) crealf(q->p1 + q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1309: note: declaration may not appear after executable
          statement in block
      float32_t alpha0 = (float32_t) crealf(q->p1 * q->p2);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1311: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1312: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 4.0f + (alpha1 * 2.0f * T) + (alpha0 * T * T);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1341: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1342: note: declaration may not appear after executable
          statement in block
      float32_t v1 = wn*wn*T*T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1343: note: declaration may not appear after executable
          statement in block
      float32_t a2p = 1.0f / (4.0f + 4.0f*z*wn*T + v1);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1606: note: declaration may not appear after executable
          statement in block
      float32_t beta2 = -(float32_t) crealf(q->z1 + q->z2 + q->z3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1607: note: declaration may not appear after executable
          statement in block
      float32_t beta1 = (float32_t) crealf((q->z1 * q->z2) + (q->z2 * q->z3) + (q->z1 * q->z3));
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1608: note: declaration may not appear after executable
          statement in block
      float32_t beta0 = -(float32_t) crealf(q->z1 * q->z2 * q->z3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1610: note: declaration may not appear after executable
          statement in block
      float32_t alpha2 = -(float32_t) crealf(q->p1 + q->p2 + q->p3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1611: note: declaration may not appear after executable
          statement in block
      float32_t alpha1 = (float32_t) crealf((q->p1 * q->p2) + (q->p2 * q->p3) + (q->p1 * q->p3));
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1612: note: declaration may not appear after executable
          statement in block
      float32_t alpha0 = -(float32_t) crealf(q->p1 * q->p2 * q->p3);
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1614: note: declaration may not appear after executable
          statement in block
      float32_t T = p->css->T;
      ^
 
"C:/ti/c2000/C2000Ware_4_03_00_00/libraries/control/DCL/c28/include/DCLF32.h",
          line 1615: note: declaration may not appear after executable
          statement in block
      float32_t a0p = 8.0f + (alpha2 * 4.0f * T) + (alpha1 * 2.0f * T * T) + (alpha0 * T * T * T);
      ^
 
"../Example_2833xAdcSoc.c", line 248: warning: this declaration has no storage
          class or type specifier
      pid1.Kp = 9.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 248: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Kp = 9.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 248: error: expected a ";"
      pid1.Kp = 9.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 249: warning: this declaration has no storage
          class or type specifier
      pid1.Ki = 0.015f;
      ^
 
"../Example_2833xAdcSoc.c", line 249: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Ki = 0.015f;
      ^
 
"../Example_2833xAdcSoc.c", line 249: error: expected a ";"
      pid1.Ki = 0.015f;
          ^
 
"../Example_2833xAdcSoc.c", line 250: warning: this declaration has no storage
          class or type specifier
      pid1.Kd = 0.35f;
      ^
 
"../Example_2833xAdcSoc.c", line 250: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Kd = 0.35f;
      ^
 
"../Example_2833xAdcSoc.c", line 250: error: expected a ";"
      pid1.Kd = 0.35f;
          ^
 
"../Example_2833xAdcSoc.c", line 251: warning: this declaration has no storage
          class or type specifier
      pid1.Kr = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 251: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Kr = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 251: error: expected a ";"
      pid1.Kr = 1.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 252: warning: this declaration has no storage
          class or type specifier
      pid1.c1 = 188.0296600613396f;
      ^
 
"../Example_2833xAdcSoc.c", line 252: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.c1 = 188.0296600613396f;
      ^
 
"../Example_2833xAdcSoc.c", line 252: error: expected a ";"
      pid1.c1 = 188.0296600613396f;
          ^
 
"../Example_2833xAdcSoc.c", line 253: warning: this declaration has no storage
          class or type specifier
      pid1.c2 = 0.880296600613396f;
      ^
 
"../Example_2833xAdcSoc.c", line 253: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.c2 = 0.880296600613396f;
      ^
 
"../Example_2833xAdcSoc.c", line 253: error: expected a ";"
      pid1.c2 = 0.880296600613396f;
          ^
 
"../Example_2833xAdcSoc.c", line 254: warning: this declaration has no storage
          class or type specifier
      pid1.d2 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 254: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.d2 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 254: error: expected a ";"
      pid1.d2 = 0.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 255: warning: this declaration has no storage
          class or type specifier
      pid1.d3 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 255: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.d3 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 255: error: expected a ";"
      pid1.d3 = 0.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 256: warning: this declaration has no storage
          class or type specifier
      pid1.i10 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 256: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.i10 = 0.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 256: error: expected a ";"
      pid1.i10 = 0.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 257: warning: this declaration has no storage
          class or type specifier
      pid1.i14 = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 257: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.i14 = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 257: error: expected a ";"
      pid1.i14 = 1.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 258: warning: this declaration has no storage
          class or type specifier
      pid1.Umax = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 258: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Umax = 1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 258: error: expected a ";"
      pid1.Umax = 1.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 259: warning: this declaration has no storage
          class or type specifier
      pid1.Umin = -1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 259: error: declaration is incompatible with
          "DCL_PID pid1" (declared at line 79)
      pid1.Umin = -1.0f;
      ^
 
"../Example_2833xAdcSoc.c", line 259: error: expected a ";"
      pid1.Umin = -1.0f;
          ^
 
"../Example_2833xAdcSoc.c", line 261: warning: this declaration has no storage
          class or type specifier
      rk = 0.25f;                             // initial value for control reference
      ^
 
"../Example_2833xAdcSoc.c", line 261: error: declaration is incompatible with
          "float rk" (declared at line 75)
      rk = 0.25f;                             // initial value for control reference
      ^
 
"../Example_2833xAdcSoc.c", line 261: error: variable "rk" has already been
          initialized
      rk = 0.25f;                             // initial value for control reference
      ^
 
"../Example_2833xAdcSoc.c", line 262: warning: this declaration has no storage
          class or type specifier
      lk = 1.0f;                              // control loop not saturated
      ^
 
"../Example_2833xAdcSoc.c", line 262: error: declaration is incompatible with
          "float lk" (declared at line 77)
      lk = 1.0f;                              // control loop not saturated
      ^
 
27 errors detected in the compilation of "../Example_2833xAdcSoc.c".
gmake: *** [Example_2833xAdcSoc.obj] Error 1
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

Problem Window screenshot :>

Thanks

Regards

Arsalan

I think this time the problem is nothing to do with the microcontroller or compiler or DCL library. This is more to do with your understanding regarding the structure of a 'C' program.

You can only assign a value to a variable when a) you declare it OR b) inside a function.

The problem lines, starting line 248, do not meet either of these rules.

Hi Kier,

Thanks for your reply.

I just moved the variables (pid.Kp, .pid.Ki, ...) in global variable section and defined the variables as float. Still having declaration errors.

Please suggest

Regards

Arsalan

Muhammad Arsalan Athar said:

Please suggest

I suggest you review some aspects of 'C' programming . Maybe start here:

https://www.cprogramming.com/tutorial/c/lesson7.html

Hi Kier, 

Thanks for sharing this link: https://www.cprogramming.com/tutorial/c/lesson7.html. It's quite useful in understanding.

I see in DCL32.h file. which has already explained structure members using declaration in float32_t format like this (float32_t Kp,float32_t Ki .....)  in Picture 1:The DCL32.h is included in the code as well.  Do i need to add this float32_t pid1 in DCL.h file? I have tried this part as well.

The struct name is called upon through DCL_PID. Then this structure DCL_PID has a variable name: pid1 --->(DCL_PID pid1). In order to access the members of structure, we write this in the code like ---> (pid1.Kp= 9.0f; ,  pid1. Ki = 0.015f; .....) But it still has same errors in this section.  See Picture 2

Picture 1:

Picture 2

Declaration format in DCL User guide:

The code is attached here:

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]  - Last 10 ADCRESULT0 values
//! - Voltage2[10]  - Last 10 ADCRESULT1 values
//! - ConversionCount   - Current result number 0-9
//! - LoopCount     - Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833x_GlobalPrototypes.h"
#include "DCLF32.h"

//
// Function Prototypes
//
__interrupt void adc_isr(void);
//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];
//float32_t pid1;
DCL_PID pid1 = PID_DEFAULTS;

float32_t yk;
float32_t lk;
float32_t uk;

float32_t rk = 0.25;                             // initial value for control reference
float32_t lk = 1.0;                              // control loop not saturated

//DCL_PID pid1 = PID_DEFAULTS;

float Duty;
float upperlim = 0.95;
float lowerlim = 0.05;
unsigned int clampactive;
//
// Main
//
void main(void)
{
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //* configure ePWM1 */
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;
    InitEPwm();                             // [F2806x_EPwm.c]
    EPwm1Regs.TBCTL.bit.CTRMODE = 3;        // freeze TB counter
    EPwm1Regs.TBCTL.bit.PRDLD = 1;          // immediate load
    EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase loading
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT signal
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // TBCLK = SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // clock divider = /1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run on emulation suspend
    EPwm1Regs.TBPRD = 0x2328;               // set period for ePWM1 (0x2328 = 10kHz)
    EPwm1Regs.TBPHS.all = 0;                // time-base Phase Register
    EPwm1Regs.TBCTR = 0;                    // time-base Counter Register
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 1;        // select SOC from zero match
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // generate pulse on 1st event
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;     // enable shadow mode
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;     // reload on CTR=zero
    EPwm1Regs.CMPA.half.CMPA = 0x0080;      // set compare A value
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;      // HIGH on CMPA up match
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;    // LOW on zero match
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.

    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;  // Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;    // count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

// initialise controller variables
pid1.Kp = 9.0f;
pid1.Ki = 0.015f;
pid1.Kd = 0.35f;
pid1.Kr = 1.0f;
pid1.c1 = 188.0296600613396f;
pid1.c2 = 0.880296600613396f;
pid1.d2 = 0.0f;
pid1.d3 = 0.0f;
pid1.i10 = 0.0f;
pid1.i14 = 1.0f;
pid1.Umax = 1.0f;
pid1.Umin = -1.0f;

//float rk = 0.25f;                             // initial value for control reference
//float lk = 1.0f;                              // control loop not saturated

//
// adc_isr -
//
__interrupt void
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    // read ADC channel
    yk = ((float) AdcRegs.ADCRESULT0 - 2048.0f) / 2047.0f;

    // run PID controller
    uk = DCL_runPID_C4(&pid1, rk, yk, lk);

    // external clamp for anti-windup reset
    clampactive = DCL_runClamp_C1(&uk, upperlim, lowerlim);
    //clampactive = DCL_runClamp_C1(&uk, Umax, Umin);
    lk = (clampactive == 0U) ? 1.0f : 0.0f;

    // write u(k) to PWM
    Duty = (uk / 2.0f + 0.5f) * (float) EPwm1Regs.TBPRD;
    EPwm1Regs.CMPA.half.CMPA = (Uint16) Duty;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Please suggest to resolve this error in the structure format.

Thanks & Regards

Arsalan

Hi Sen & Kier,

Thanks for your reply. I am attaching updated code again. As Sen said that I am defining a variables just after the Global variables. Now the errors have been reduced from 26 to 3. 

The only problem is pid1 (variable) (undefined). As kier shared about the struct method, I tried to define pid1 in struct routine like:

(typedef struct dcl_pid pid1;) in main function or outside main function but it doesn't work.

Can you please suggest to define pid1 in struct format? 

The code is shared as

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]  - Last 10 ADCRESULT0 values
//! - Voltage2[10]  - Last 10 ADCRESULT1 values
//! - ConversionCount   - Current result number 0-9
//! - LoopCount     - Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833x_GlobalPrototypes.h"
#include "DCLF32.h"

//
// Function Prototypes
//


__interrupt void adc_isr(void);
//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];

float32_t yk;
float32_t lk;
float32_t uk;
float32_t rk = 0.25;                             // initial value for control reference
float32_t lk = 1.0;                              // control loop not saturated

float Duty;
float upperlim = 0.95;
float lowerlim = 0.05;
unsigned int clampactive;

//
// Main
//

void main(void)
{


    DCL_PID pid1 = PID_DEFAULTS;

    pid1.Kp = 9.0f;
    pid1.Ki = 0.015f;
    pid1.Kd = 0.35f;
    pid1.Kr = 1.0f;
    pid1.c1 = 188.0296600613396f;
    pid1.c2 = 0.880296600613396f;
    pid1.d2 = 0.0f;
    pid1.d3 = 0.0f;
    pid1.i10 = 0.0f;
    pid1.i14 = 1.0f;
    pid1.Umax = 1.0f;
    pid1.Umin = -1.0f;

    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //* configure ePWM1 */
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;
    InitEPwm();                             // [F2806x_EPwm.c]
    EPwm1Regs.TBCTL.bit.CTRMODE = 3;        // freeze TB counter
    EPwm1Regs.TBCTL.bit.PRDLD = 1;          // immediate load
    EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase loading
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT signal
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // TBCLK = SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // clock divider = /1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run on emulation suspend
    EPwm1Regs.TBPRD = 0x2328;               // set period for ePWM1 (0x2328 = 10kHz)
    EPwm1Regs.TBPHS.all = 0;                // time-base Phase Register
    EPwm1Regs.TBCTR = 0;                    // time-base Counter Register
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 1;        // select SOC from zero match
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // generate pulse on 1st event
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;     // enable shadow mode
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;     // reload on CTR=zero
    EPwm1Regs.CMPA.half.CMPA = 0x0080;      // set compare A value
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;      // HIGH on CMPA up match
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;    // LOW on zero match
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.

    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;  // Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;    // count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

//
// adc_isr -
//
__interrupt void
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    // read ADC channel
    yk = ((float) AdcRegs.ADCRESULT0 - 2048.0f) / 2047.0f;

    // run PID controller
    uk = DCL_runPID_C4(&pid1, rk, yk, lk);

    // external clamp for anti-windup reset
    clampactive = DCL_runClamp_C1(&uk, upperlim, lowerlim);
    //clampactive = DCL_runClamp_C1(&uk, Umax, Umin);
    lk = (clampactive == 0U) ? 1.0f : 0.0f;

    // write u(k) to PWM
    Duty = (uk / 2.0f + 0.5f) * (float) EPwm1Regs.TBPRD;
    EPwm1Regs.CMPA.half.CMPA = (Uint16) Duty;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Thanks

Kind Regards

Arsalan

Hi Sen,

Thanks for your reply

This time:  float pid11; or float32_t pid1; under the global variables but having still errors. 

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]  - Last 10 ADCRESULT0 values
//! - Voltage2[10]  - Last 10 ADCRESULT1 values
//! - ConversionCount   - Current result number 0-9
//! - LoopCount     - Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833x_GlobalPrototypes.h"
#include "DCLF32.h"

//
// Function Prototypes
//


__interrupt void adc_isr(void);
//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];

//typedef struct dcl_pid pid1;

//float32_t pid1;
float pid1;
//DCL_PID pid1 = PID_DEFAULTS;


float32_t yk;
float32_t lk;
float32_t uk;
float32_t rk = 0.25;                             // initial value for control reference
float32_t lk = 1.0;                              // control loop not saturated

float Duty;
float upperlim = 0.95;
float lowerlim = 0.05;
unsigned int clampactive;

//
// Main
//

void main(void)
{


    DCL_PID pid1 = PID_DEFAULTS;

    pid1.Kp = 9.0f;
    pid1.Ki = 0.015f;
    pid1.Kd = 0.35f;
    pid1.Kr = 1.0f;
    pid1.c1 = 188.0296600613396f;
    pid1.c2 = 0.880296600613396f;
    pid1.d2 = 0.0f;
    pid1.d3 = 0.0f;
    pid1.i10 = 0.0f;
    pid1.i14 = 1.0f;
    pid1.Umax = 1.0f;
    pid1.Umin = -1.0f;

    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //* configure ePWM1 */
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;
    InitEPwm();                             // [F2806x_EPwm.c]
    EPwm1Regs.TBCTL.bit.CTRMODE = 3;        // freeze TB counter
    EPwm1Regs.TBCTL.bit.PRDLD = 1;          // immediate load
    EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase loading
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT signal
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // TBCLK = SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // clock divider = /1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run on emulation suspend
    EPwm1Regs.TBPRD = 0x2328;               // set period for ePWM1 (0x2328 = 10kHz)
    EPwm1Regs.TBPHS.all = 0;                // time-base Phase Register
    EPwm1Regs.TBCTR = 0;                    // time-base Counter Register
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 1;        // select SOC from zero match
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // generate pulse on 1st event
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;     // enable shadow mode
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;     // reload on CTR=zero
    EPwm1Regs.CMPA.half.CMPA = 0x0080;      // set compare A value
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;      // HIGH on CMPA up match
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;    // LOW on zero match
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.

    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;  // Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;    // count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

//
// adc_isr -
//
__interrupt void
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    // read ADC channel
    yk = ((float) AdcRegs.ADCRESULT0 - 2048.0f) / 2047.0f;

    // run PID controller
    uk = DCL_runPID_C4(&pid1, rk, yk, lk);

    // external clamp for anti-windup reset
    clampactive = DCL_runClamp_C1(&uk, upperlim, lowerlim);
    //clampactive = DCL_runClamp_C1(&uk, Umax, Umin);
    lk = (clampactive == 0U) ? 1.0f : 0.0f;

    // write u(k) to PWM
    Duty = (uk / 2.0f + 0.5f) * (float) EPwm1Regs.TBPRD;
    EPwm1Regs.CMPA.half.CMPA = (Uint16) Duty;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Please suggest

Thanks

Regards

Arsalan

Hi Sen,

Thanks for your reply. All your suggestions are quite helpful

Now all the errors have been removed except 1 warnings. Will it make any problem if we ignore these warnings?

I am going to test this on hardware. I also have added the GPIO function in the code to enable EPWM & also have separated the EPWM configure lines in different function.

Please check the warnings in below picture & review the code once again:

Picture

Code

//###########################################################################
//
// FILE:   Example_2833xAdcSoc.c
//
// TITLE:  ADC Start of Conversion Example
//
//! \addtogroup f2833x_example_list
//! <h1> ADC Start of Conversion (adc_soc)</h1>
//!
//! This ADC example uses ePWM1 to generate a periodic ADC SOC on SEQ1.
//! Two channels are converted, ADCINA3 and ADCINA2.
//!
//! \b Watch \b Variables \n
//! - Voltage1[10]  - Last 10 ADCRESULT0 values
//! - Voltage2[10]  - Last 10 ADCRESULT1 values
//! - ConversionCount   - Current result number 0-9
//! - LoopCount     - Idle loop counter
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833x_GlobalPrototypes.h"
#include "DCLF32.h"

//
// Function Prototypes
//

void gpio_select(void);
void Setup_ePWM1(void);

__interrupt void adc_isr(void);
//
// Globals
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[10];
Uint16 Voltage2[10];
//DCL_PID pid1 = PID_DEFAULTS;

//typedef struct dcl_pid pid1;

struct dcl_pid pid1;
//float pid1;
DCL_PID pid1 = PID_DEFAULTS;


float32_t yk;
float32_t lk;
float32_t uk;
//float32_t rk = 0.25;                             // initial value for control reference
//float32_t lk = 1.0;                              // control loop not saturated
float32_t rk;                             // initial value for control reference
float32_t lk;                              // control loop not saturated


float Duty;
float upperlim = 0.95;
float lowerlim = 0.05;
unsigned int clampactive;

//
// Main
//

void main(void)
{


    //DCL_PID pid1 = PID_DEFAULTS;

    pid1.Kp = 9.0f;
    pid1.Ki = 0.015f;
    pid1.Kd = 0.35f;
    pid1.Kr = 1.0f;
    pid1.c1 = 188.0296600613396f;
    pid1.c2 = 0.880296600613396f;
    pid1.d2 = 0.0f;
    pid1.d3 = 0.0f;
    pid1.i10 = 0.0f;
    pid1.i14 = 1.0f;
    pid1.Umax = 1.0f;
    pid1.Umin = -1.0f;

    rk = 0.25;                             // initial value for control reference
    lk = 1.0;

    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the DSP2833x_SysCtrl.c file.
    //
    InitSysCtrl();

    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
        //
        // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
        //
        #define ADC_MODCLK 0x2
    #endif
    EDIS;

    //
    // Define ADCCLK clock frequency ( less than or equal to 25 MHz )
    // Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
    //
    EALLOW;
    SysCtrlRegs.HISPCP.all = ADC_MODCLK;
    EDIS;

    //
    // Step 2. Initialize GPIO:
    // This example function is found in the DSP2833x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    // InitGpio();  // Skipped for this example

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the DSP2833x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
    // This function is found in DSP2833x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    //* configure ePWM1 */
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;

    //InitEPwm1Gpio();                             // [F2806x_EPwm.c]
    gpio_select();
    Setup_ePWM1();     // init  ePWM1A


    //void Setup_ePWM1(void)
    //{
    //EPwm1Regs.TBCTL.bit.CTRMODE = 3;        // freeze TB counter
    //EPwm1Regs.TBCTL.bit.PRDLD = 1;          // immediate load
    //EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase loading
    //EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT signal
    //EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // TBCLK = SYSCLKOUT
    //EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // clock divider = /1
    //EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run on emulation suspend
    //EPwm1Regs.TBPRD = 0x2328;               // set period for ePWM1 (0x2328 = 10kHz)
    //EPwm1Regs.TBPHS.all = 0;                // time-base Phase Register
    //EPwm1Regs.TBCTR = 0;                    // time-base Counter Register
    //EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // enable SOC on A group
    //EPwm1Regs.ETSEL.bit.SOCASEL = 1;        // select SOC from zero match
    //EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // generate pulse on 1st event
    //EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;     // enable shadow mode
    //EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;     // reload on CTR=zero
    //EPwm1Regs.CMPA.half.CMPA = 0x0080;      // set compare A value
    //EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;      // HIGH on CMPA up match
    //EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;    // LOW on zero match
    //}

    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

    //
    // Step 4. Initialize all the Device Peripherals:
    // This function is found in DSP2833x_InitPeripherals.c
    //
    // InitPeripherals(); // Not required for this example
    InitAdc();  // For this example, init the ADC

    //
    // Step 5. User specific code, enable interrupts:
    //

    //gpio_select();
    //Setup_ePWM1();     // init  ePWM1A,ePWM1B


    //
    // Enable ADCINT in PIE
    //
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    IER |= M_INT1;      // Enable CPU Interrupt 1
    EINT;               // Enable Global interrupt INTM
    ERTM;               // Enable Global realtime interrupt DBGM

    LoopCount = 0;
    ConversionCount = 0;

    //
    // Configure ADC
    //
    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.

    //
    // Enable SOCA from ePWM to start SEQ1
    //
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)

    //
    // Assumes ePWM1 clock is already enabled in InitSysCtrl();
    //
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;  // Set compare A value
    EPwm1Regs.TBPRD = 0xFFFF;           // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;    // count up and start

    //
    // Wait for ADC interrupt
    //
    for(;;)
    {
        LoopCount++;
    }
}

//

void Setup_ePWM1(void)
    {
    EPwm1Regs.TBCTL.bit.CTRMODE = 3;        // freeze TB counter
    EPwm1Regs.TBCTL.bit.PRDLD = 1;          // immediate load
    EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase loading
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT signal
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // TBCLK = SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // clock divider = /1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run on emulation suspend
    EPwm1Regs.TBPRD = 0x2328;               // set period for ePWM1 (0x2328 = 10kHz)
    EPwm1Regs.TBPHS.all = 0;                // time-base Phase Register
    EPwm1Regs.TBCTR = 0;                    // time-base Counter Register
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 1;        // select SOC from zero match
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // generate pulse on 1st event
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;     // enable shadow mode
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;     // reload on CTR=zero
    EPwm1Regs.CMPA.half.CMPA = 0x0080;      // set compare A value
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;      // HIGH on CMPA up match
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;    // LOW on zero match
    }


void gpio_select(void)
        {
        EALLOW;
        GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;   // Enable pullup on GPIO0
        GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;   // Enable pullup on GPIO1
        GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;  // GPIO0 = PWM1A
        GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;  // GPIO0 = PWM1B
        EDIS;

        }
// adc_isr -
//
__interrupt void
adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;

    // read ADC channel
    yk = ((float) AdcRegs.ADCRESULT0 - 2048.0f) / 2047.0f;

    // run PID controller
    uk = DCL_runPID_C4(&pid1, rk, yk, lk);

    // external clamp for anti-windup reset
    clampactive = DCL_runClamp_C1(&uk, upperlim, lowerlim);
    //clampactive = DCL_runClamp_C1(&uk, Umax, Umin);
    lk = (clampactive == 0U) ? 1.0f : 0.0f;

    // write u(k) to PWM
    Duty = (uk / 2.0f + 0.5f) * (float) EPwm1Regs.TBPRD;
    EPwm1Regs.CMPA.half.CMPA = (Uint16) Duty;

    //
    // If 40 conversions have been logged, start over
    //
    if(ConversionCount == 9)
    {
        ConversionCount = 0;
    }
    else
    {
        ConversionCount++;
    }

    //
    // Reinitialize for next ADC sequence
    //
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}

//
// End of File
//

Thanks

Kind Regards

Arsalan