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LAUNCHXL-F28379D: Passing CLB TILE0 output to CLB TILE1 input

Colin Bryant
Prodigy 50 points
Part Number: LAUNCHXL-F28379D

What is the proper way to pass an output form one CLB TILE to input of another CLB TILE?

example.. Below is CLB TILE (TILE0); would like to use out0 and out 7 as input to another tile (TILE1).

TILE0:

TILE1:

For Boundary Inputs for TILE1, in syscfg I have the following:

Intention is to used TILE0 out0 as input to TILE1 i4 and TILE0 out7 as input to TILE1 i5.

Using Simulink.. in "Hardware Implementation/Target hardware resources" am setting up CLB TILE1 inputs as shown below:

Setting IN4 and IN5 to GPREG input 0; is this correct? 

When I run my model.  The TILE0 out0 and out7 don't seem to pass to TILE1 i4 and i5.. I tested this by sending i4 or i5 to TILE1 out4 or out5 (out4 and out5 are sent to Output X-BAR where signal is assigned to GPIO)

  • 0
    TI__Genius 14011 points

    Hi Colin,

    On F2837xD, the CLB is limited in that a single tile can only have up to 2 outputs which can be routed to other CLB tiles or an external GPIO. These two outputs are OUTLUT4 and OUTLUT5. For the first CLB tile, the desired outputs should be connected to outputs 4 and 5, then associated with any of the eight AUXSIG on the device. Then in the second tile, you can configure any of the inputs to come from your configured AUXSIG coming from the Global input mux. There is no 4/5 restriction for the CLB inputs so these can be numbered as you desire

    Regards,

    Peter

  • 0 in reply to Peter Luong1
    Prodigy 50 points

    Hi Peter,

    Thanks for getting back to me.  Appreciate it.

    Makes sense.

    Best,

    Colin