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TMS320F28388S: PROGRAM_ERROR when trying to flash the CM with serial programmer

Part Number: TMS320F28388S

I cannot flash program our CM firmware into a TMS320F28388S processer using the serial flash programmer and the SCI flash kernel.

I edited all of the flash sections in my linker file to use the ALIGN(8) directive to try to fix the problem but it didn't change the behavior.

Here is the error message I am getting:

Application load successful!
Done waiting for application to download and boot...
SUCCESS of Command
ERROR Status: PROGRAM_ERROR
ERROR Address: 0x204008
Flash API Error: Incorrect Data Buffer Length
Please refer to the Flash API documentation for further explanation of the error.
FMSTAT Register contents: 00

What do I need to do to resolve this issue?

  • Thomas,

    The error address seems to be aligned on 64-bit boundary.  For CM, to make the sections aligned on 128-bit boundary, please use ALIGN(16) instead of ALIGN(8).  

    Let me know if that does not help to fix it.

    Thanks and regards,

    Vamsi

  • Hi Vamsi,

    You suggestion did allow me to flash program the CM but the firmware will not run with the new alignment setting. Is there something else I need to adjust after changing the alignment directive?

    Thank you,

    Tom Dombroski

  • Thomas,

    Glad the programming succeeded.

    Coming to the execution failure: Is that the only change that you did between successfully executing version and failed version of your application?

    What happens if you program the same image with CCS flash plugin?  Does application execute successfully in this case?

    Thanks and regards,
    Vamsi

  • Hi Vamsi,

    The only change I made between the executing version and the failed version is the alignment changes to the linker file. The firmware still fails to run after being loaded through CCS using the emulator pod. I reloaded the CM firmware before the change and the firmware executes.

    Thank you,

    Tom Dombroski

  • Hi Tom,

    Can you share the two versions of the linker command file?

    Thanks and regards,

    Vamsi

  • Hi Vamsi,

    Here is the linker file that will allow my firmware to execute but will not flash with the serial programmer:

    MEMORY
    {
    	BOOTLOADER_ENTRYPOINT 	: origin = 0x00200000, length = 0x00000020
    
    	/* SECTOR 0. Used to store secondary bootloader that will never be overwritten by FirmwareOverEtherCat. */
    	BOOTLOADER 				: origin = 0x00200020, length = 0x00003FD0
    
    	/* SECTORS 1 through 6. Used for application code and variables. */
    	FIRMWARE_VALID			: origin = 0x00204000, length = 0x00000008
    	FIRMWARE_ENTRYPOINT 	: origin = 0x00204008, length = 0x00000008
    	FIRMWARE 				: origin = 0x00204010, length = 0x0003BFF0
    
    	/* SECTORS 7 through 13. Used to store incoming firmware image before FIRMWAREing new code. */
       	FIRMWARE_UPDATE		: origin = 0x00240000, length = 0x040000
    
    	C1RAM: origin = 0x1FFFC000, length = 0x00001FFF
    	C0RAM: origin = 0x1FFFE000, length = 0x00001FFF
    
    	/* Part of S0, BOOT rom will use this for stack */
    	BOOT_RSVD  		: origin = 0x20000000, length = 0x00000800
    	SRAM  			: origin = 0x20000800, length = 0x0000F7FF
    	E0RAM			: origin = 0x20010000, length = 0x00003FFF
    
    	CPU1TOCMMSGRAM0  		: origin = 0x20080000, length = 0x00000180
    	CPU1TOCMMSGRAM1  		: origin = 0x20080180, length = 0x00000D80
    	CMTOCPU1MSGRAM0  		: origin = 0x20082000, length = 0x00000180
    	CMTOCPU1MSGRAM1  		: origin = 0x20082180, length = 0x00000D80
    
    	CPU2TOCMMSGRAM0  		: origin = 0x20084000, length = 0x00000800
    	CPU2TOCMMSGRAM1  		: origin = 0x20084800, length = 0x00000800
    	CMTOCPU2MSGRAM0  		: origin = 0x20086000, length = 0x00000800
    	CMTOCPU2MSGRAM1  		: origin = 0x20086800, length = 0x00000800
    }
    
    SECTIONS
    {
    	.bootloader_entrypoint 	: > BOOTLOADER_ENTRYPOINT
    
    	.boot_text > BOOTLOADER
    	.boot_const > BOOTLOADER
    
    	.boot_TI.ramfunc : {}
    		LOAD = BOOTLOADER,
    		RUN = SRAM,
    		LOAD_START(BootRamfuncsLoadStart),
    		LOAD_SIZE(BootRamfuncsLoadSize),
    		RUN_START(BootRamfuncsRunStart),
    		RUN_SIZE(BootRamfuncsRunSize),
    		ALIGN(8)
    
    	.valid_flag : > FIRMWARE_VALID
    	.firmware_entrypoint : > FIRMWARE_ENTRYPOINT
    
    	.vftable	: > FIRMWARE  			  	/* Application placed vector table in FIRMWARE. */
    	.text 		: > FIRMWARE
    	.cinit  	: > FIRMWARE
    	.pinit  	: > FIRMWARE
    	.switch 	: > FIRMWARE
    	.econst 	: > FIRMWARE
    	.const 		: > FIRMWARE
    
    	.vtable 	: > SRAM				/* Application placed vector table in RAM. */
    
    	.sysmem 	: > C1RAM
    	.stack  	: > C1RAM
    	.ebss		: > C1RAM
    	.esysmem	: > C1RAM
    	.data		: > SRAM
    	.bss 		: > SRAM
    
    	.p402Params: {
    		ec_objects.obj (.data)
    		ec_od.obj (.data:ec_varTable*)
    		ec_od.obj (.const:ec_constTable*)
    		ec_od.obj (.const:.string:ec_constTable*)
    	} > CMTOCPU1MSGRAM1
    	.iccShared	: > CMTOCPU1MSGRAM1
    
    	MSGRAM_CM_TO_CPU1 		: > CMTOCPU1MSGRAM0, type=NOINIT
    	MSGRAM_CM_TO_CPU1_USER	: > CMTOCPU1MSGRAM1, type=NOINIT
    	MSGRAM_CM_TO_CPU2 		: > CMTOCPU2MSGRAM0, type=NOINIT
    	MSGRAM_CPU1_TO_CM 		: > CPU1TOCMMSGRAM0, type=NOINIT
    	MSGRAM_CPU1_TO_CM_USER	: > CPU1TOCMMSGRAM1, type=NOINIT
    	MSGRAM_CPU2_TO_CM 		: > CPU2TOCMMSGRAM0, type=NOINIT
    
    	.TI.ramfunc : {}
    		LOAD = FIRMWARE,
    		RUN = SRAM,
    		LOAD_START(RamfuncsLoadStart),
    		LOAD_SIZE(RamfuncsLoadSize),
    		RUN_START(RamfuncsRunStart),
    		RUN_SIZE(RamfuncsRunSize),
    		ALIGN(8)
    }

    Here is the linker file that can be flash programmed but will not execute:

    MEMORY
    {
    	BOOTLOADER_ENTRYPOINT 	: origin = 0x00200000, length = 0x00000020
    
    	/* SECTOR 0. Used to store secondary bootloader that will never be overwritten by FirmwareOverEtherCat. */
    	BOOTLOADER 				: origin = 0x00200020, length = 0x00003FD0
    
    	/* SECTORS 1 through 6. Used for application code and variables. */
    	FIRMWARE_VALID			: origin = 0x00204000, length = 0x00000010
    	FIRMWARE_ENTRYPOINT 	: origin = 0x00204010, length = 0x00000010
    	FIRMWARE 				: origin = 0x00204020, length = 0x0003BFE0
    
    	/* SECTORS 7 through 13. Used to store incoming firmware image before FIRMWAREing new code. */
       	FIRMWARE_UPDATE		: origin = 0x00240000, length = 0x040000
    
    	C1RAM: origin = 0x1FFFC000, length = 0x00001FFF
    	C0RAM: origin = 0x1FFFE000, length = 0x00001FFF
    
    	/* Part of S0, BOOT rom will use this for stack */
    	BOOT_RSVD  		: origin = 0x20000000, length = 0x00000800
    	SRAM  			: origin = 0x20000800, length = 0x0000F7FF
    	E0RAM			: origin = 0x20010000, length = 0x00003FFF
    
    	CPU1TOCMMSGRAM0  		: origin = 0x20080000, length = 0x00000180
    	CPU1TOCMMSGRAM1  		: origin = 0x20080180, length = 0x00000D80
    	CMTOCPU1MSGRAM0  		: origin = 0x20082000, length = 0x00000180
    	CMTOCPU1MSGRAM1  		: origin = 0x20082180, length = 0x00000D80
    
    	CPU2TOCMMSGRAM0  		: origin = 0x20084000, length = 0x00000800
    	CPU2TOCMMSGRAM1  		: origin = 0x20084800, length = 0x00000800
    	CMTOCPU2MSGRAM0  		: origin = 0x20086000, length = 0x00000800
    	CMTOCPU2MSGRAM1  		: origin = 0x20086800, length = 0x00000800
    }
    
    SECTIONS
    {
    	.bootloader_entrypoint 	: > BOOTLOADER_ENTRYPOINT
    
    	.boot_text > BOOTLOADER
    	.boot_const > BOOTLOADER
    
    	.boot_TI.ramfunc : {}
    		LOAD = BOOTLOADER,
    		RUN = SRAM,
    		LOAD_START(BootRamfuncsLoadStart),
    		LOAD_SIZE(BootRamfuncsLoadSize),
    		RUN_START(BootRamfuncsRunStart),
    		RUN_SIZE(BootRamfuncsRunSize),
    		ALIGN(8)
    
    	.valid_flag : > FIRMWARE_VALID
    	.firmware_entrypoint : > FIRMWARE_ENTRYPOINT
    
    	.vftable	: > FIRMWARE, ALIGN(16)  			  	/* Application placed vector table in FIRMWARE. */
    	.text 		: > FIRMWARE, ALIGN(16)
    	.cinit  	: > FIRMWARE, ALIGN(16)
    	.pinit  	: > FIRMWARE, ALIGN(16)
    	.switch 	: > FIRMWARE, ALIGN(16)
    	.econst 	: > FIRMWARE, ALIGN(16)
    	.const 		: > FIRMWARE, ALIGN(16)
    
    	.vtable 	: > SRAM				/* Application placed vector table in RAM. */
    
    	.sysmem 	: > C1RAM
    	.stack  	: > C1RAM
    	.ebss		: > C1RAM
    	.esysmem	: > C1RAM
    	.data		: > SRAM
    	.bss 		: > SRAM
    
    	.p402Params: {
    		ec_objects.obj (.data)
    		ec_od.obj (.data:ec_varTable*)
    		ec_od.obj (.const:ec_constTable*)
    		ec_od.obj (.const:.string:ec_constTable*)
    	} > CMTOCPU1MSGRAM1
    	.iccShared	: > CMTOCPU1MSGRAM1
    
    	MSGRAM_CM_TO_CPU1 		: > CMTOCPU1MSGRAM0, type=NOINIT
    	MSGRAM_CM_TO_CPU1_USER	: > CMTOCPU1MSGRAM1, type=NOINIT
    	MSGRAM_CM_TO_CPU2 		: > CMTOCPU2MSGRAM0, type=NOINIT
    	MSGRAM_CPU1_TO_CM 		: > CPU1TOCMMSGRAM0, type=NOINIT
    	MSGRAM_CPU1_TO_CM_USER	: > CPU1TOCMMSGRAM1, type=NOINIT
    	MSGRAM_CPU2_TO_CM 		: > CPU2TOCMMSGRAM0, type=NOINIT
    
    	.TI.ramfunc : {}
    		LOAD = FIRMWARE,
    		RUN = SRAM,
    		LOAD_START(RamfuncsLoadStart),
    		LOAD_SIZE(RamfuncsLoadSize),
    		RUN_START(RamfuncsRunStart),
    		RUN_SIZE(RamfuncsRunSize),
    		ALIGN(16)
    }

    Thank you,

    Tom Dombroski

  • Hi Tom,

    We will review and get back to you in a day or two.

    Thanks and regards,

    Vamsi

  • Hi Tom,

    I see a few sections are not aligned.  Can you try aligning all the initialized sections mapped to flash using ALIGN(16)?  Example: .boot_text, .boot_const, .bootloader_entrypoint etc.

    Thanks and regards,

    Vamsi

  • Hi Vamsi,

    We were branching to an address in one of our assembly files that was invalid after  I made the alignment changes to my linker. One I fixed the address to match the new memory map I was able to get our firmware to run.

    Thank you,

    Tom Dombroski