Part Number: TMS320F28335
Hi expert,
My customer is trying to configurate the McBSP of 28335 as SPI slave.
He meets the issue that the data transmit from McBSP SPI slave cannot meet the rising edge of clock.
the configuration code is as follow:
SPIC_COMMU_REGS.SPCR2.all = 0x0000 ;
SPIC_COMMU_REGS.SPCR1.all = 0x0000 ;
SPIC_COMMU_REGS.SPCR2.bit.GRST = 0 ;
SPIC_COMMU_REGS.SPCR1.bit.CLKSTP = 2 ;
SPIC_COMMU_REGS.SPCR1.bit.DLB = 0 ;
SPIC_COMMU_REGS.SPCR1.bit.RINTM = 0 ;
SPIC_COMMU_REGS.PCR.bit.CLKXP = 0 ;
SPIC_COMMU_REGS.PCR.bit.CLKXM = 0 ; //作为从机
SPIC_COMMU_REGS.PCR.bit.SCLKME = 0 ;
SPIC_COMMU_REGS.SRGR2.bit.CLKSM= 1 ; //用低速时钟
SPIC_COMMU_REGS.SRGR1.bit.CLKGDV = 1;//2分频
SPIC_COMMU_REGS.PCR.bit.FSXM = 0; // The FSX pin is an input pin.
SPIC_COMMU_REGS.PCR.bit.FSXP = 1 ; // The FSX pin is active low.
SPIC_COMMU_REGS.PCR.bit.CLKRM = 0 ;
SPIC_COMMU_REGS.PCR.bit.FSRM = 0 ;
SPIC_COMMU_REGS.XCR2.bit.XDATDLY =0 ;
SPIC_COMMU_REGS.RCR2.bit.RDATDLY =0 ;
SPIC_COMMU_REGS.MFFINT.bit.RINT = 1 ;
SPIC_COMMU_REGS.MFFINT.bit.XINT = 0 ;
SPIC_COMMU_REGS.RCR2.bit.RPHASE = 0 ;//接收单相
SPIC_COMMU_REGS.XCR2.bit.XPHASE = 0 ;//发送 单相
SPIC_COMMU_REGS.RCR2.bit.RFIG = 0 ;//发送 帧不忽略
SPIC_COMMU_REGS.XCR2.bit.XFIG = 0 ;//发送 帧不忽略
SPIC_COMMU_REGS.RCR1.bit.RWDLEN1 = 5 ;//接收 word length 32 bits
SPIC_COMMU_REGS.XCR1.bit.XWDLEN1 = 5 ;//发送 word length 32 bits
SPIC_COMMU_REGS.RCR1.bit.RFRLEN1 = 0 ;//接收 frame length 4 word
SPIC_COMMU_REGS.XCR1.bit.XFRLEN1 = 0 ;//发送 frame length 4 word
SPIC_COMMU_REGS.SPCR2.bit.GRST =1 ;//enable the sample rate generator
for(i = 0 ; i < 10 ; i++); // Wait at least 2 SRG clock cycles
SPIC_COMMU_REGS.SPCR2.bit.XRST =1 ; // enable the transmitter
SPIC_COMMU_REGS.SPCR1.bit.RRST =1 ; //enable the receiver
SPIC_COMMU_REGS.SPCR2.bit.FRST =1 ; //enable the frame-synchronization logic
PS: the SPIC_COMMU_REGS is the rename of McbspXRegs
then he try to fix this issue by changing the SPCR1.bit.CLKSTP to 3 and changing the SRGR1.bit.CLKGDV to 9. But he meet the issue that the data width cannot meet the clock.
the configuration code is as follow:
SPIC_COMMU_REGS.SPCR2.all = 0x0000 ;
SPIC_COMMU_REGS.SPCR1.all = 0x0000 ;
SPIC_COMMU_REGS.SPCR2.bit.GRST = 0 ;
SPIC_COMMU_REGS.SPCR1.bit.CLKSTP = 3 ;
SPIC_COMMU_REGS.SPCR1.bit.DLB = 0 ;
SPIC_COMMU_REGS.SPCR1.bit.RINTM = 0 ;
SPIC_COMMU_REGS.PCR.bit.CLKXP = 0 ;
SPIC_COMMU_REGS.PCR.bit.CLKXM = 0 ; //作为从机
SPIC_COMMU_REGS.PCR.bit.SCLKME = 0 ;
SPIC_COMMU_REGS.SRGR2.bit.CLKSM= 1 ; //用低速时钟
SPIC_COMMU_REGS.SRGR1.bit.CLKGDV = 9;//,10分频
SPIC_COMMU_REGS.PCR.bit.FSXM = 0; // The FSX pin is an input pin.
SPIC_COMMU_REGS.PCR.bit.FSXP = 1 ; // The FSX pin is active low.
SPIC_COMMU_REGS.PCR.bit.CLKRM = 0 ;
SPIC_COMMU_REGS.PCR.bit.FSRM = 0 ;
SPIC_COMMU_REGS.XCR2.bit.XDATDLY =0 ;
SPIC_COMMU_REGS.RCR2.bit.RDATDLY =0 ;
SPIC_COMMU_REGS.MFFINT.bit.RINT = 1 ;
SPIC_COMMU_REGS.MFFINT.bit.XINT = 0 ;
SPIC_COMMU_REGS.RCR2.bit.RPHASE = 0 ;//接收单相
SPIC_COMMU_REGS.XCR2.bit.XPHASE = 0 ;//发送 单相
SPIC_COMMU_REGS.RCR2.bit.RFIG = 0 ;//发送 帧不忽略
SPIC_COMMU_REGS.XCR2.bit.XFIG = 0 ;//发送 帧不忽略
SPIC_COMMU_REGS.RCR1.bit.RWDLEN1 = 5 ;//接收 word length 32 bits
SPIC_COMMU_REGS.XCR1.bit.XWDLEN1 = 5 ;//发送 word length 32 bits
SPIC_COMMU_REGS.RCR1.bit.RFRLEN1 = 0 ;//接收 frame length 4 word
SPIC_COMMU_REGS.XCR1.bit.XFRLEN1 = 0 ;//发送 frame length 4 word
SPIC_COMMU_REGS.SPCR2.bit.GRST =1 ;//enable the sample rate generator
for(i = 0 ; i < 10 ; i++); // Wait at least 2 SRG clock cycles
SPIC_COMMU_REGS.SPCR2.bit.XRST =1 ; // enable the transmitter
SPIC_COMMU_REGS.SPCR1.bit.RRST =1 ; //enable the receiver
SPIC_COMMU_REGS.SPCR2.bit.FRST =1 ; //enable the frame-synchronization logic
PS: the SPIC_COMMU_REGS is the rename of McbspXRegs
Are there any suggestions for this issue?
