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TMS320F28032-Q1: what failure will cause CSM permanently locked?

Will Gao
Intellectual 2335 points
Part Number: TMS320F28032-Q1

Hi BU experts, 

In customer side, already found 2 pcs F28032 CSM unexpectedly locked. They don't use CSM to lock the device, however still found 2 pcs from their field returned with OTA failure and they found that the 2 return chips can't be programmed, and all Flash contents are 0 and CSM secure bit is set to 1 (that means it is locked). 

So I checked their OTA process, the usage of Flash API is fine. And they only operates the sector C-H, but not sector A and B (these 2 sectors are used to store their Bootloader Firmware). So their program may not lead to CSM locked. I was told that the sector A is balanced with sector H, and I think wrong operation on sector H may also lead to sector A cleared so that CSM permanently locked? But I can't sure it is the circumstance in this case. 

So I want to check you what failure will cause CSM  permanently locked? If it possible that wrong operation on sector H may also lead to sector A cleared so that CSM permanently locked? And any other system factors will lead to this issue, such as Flash depletion, and how it lead to CSM locked? 

Furtherly, I want to know the balancing mechanism in F2803x, i.e. how sector H is balanced with sector A and what factors will impact/enhance this "balancing connection", e.g. chip failure or weakness. 

Regards, 

Will 

  • 0
    TI__Guru* 95315 points

    Will,

                If devices are locked and you are unable to connect/unlock them via CCS, I am afraid your only choice is to replace the parts. Devices may become inadvertently locked if the Erase/Program operation is disturbed due to a brown-out/black-out condition. This could also happen if the devices are current-starved during erase/program operation. See https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/826343 

    Your understanding of balanced sectors is largely correct. Let me look into the Flash spec for more information.

  • 0 in reply to Hareesh Janakiraman
    TI__Guru* 95315 points

    Compact the sector: check for over erased (i.e. depleted bits).  This portion of the algo will gently add charge back to those bits which were over erased. Depleted bits can affect how the sector reads back as well as what is called the balanced sector. If there are depleted bits in one sector, it will affect how bits read back in its balanced sector. If the erase process is interrupted and bits are left in a depleted state it can have an influence during reads of other bits in the flash. Please see

    https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/111512/are-dual-application-images-possible/398375#398375

  • 0 in reply to Hareesh Janakiraman
    TI__Intellectual 2335 points

    Hi Hareesh, 

    Thanks for your input. Customer now wants us to analyze the root-cause for the failure chips. They are Auto customer and always dig into each failure and push the field team very tough. 

    Hareesh Janakiraman said:
    Depleted bits can affect how the sector reads back as well as what is called the balanced sector. If there are depleted bits in one sector, it will affect how bits read back in its balanced sector. If the erase process is interrupted and bits are left in a depleted state it can have an influence during reads of other bits in the flash.

    So that means if in sector H there are some over-erased (depleted) bits, the read-out for sector A may be influenced, and the CSM region may be read out with all 0, and so that the secure logic think that the device should be secured? Is my understanding right? How can I approve my assumption? 

    Regards, 

    Will 

  • +1 in reply to Will Gao
    TI__Guru* 95315 points

    Will,

        Your understanding is correct but it is only an assumption. Meaning, depletion is only a possible reason for what the customer is seeing. There may be other reasons like a brownout during programming. Let us take further debug/analysis offline. I will close the post.