TMS320F28035: TMS320F28035

Hello Prasanth,

Can you please place your code in a code block using Insert > Code for your post (or I can do this for you, since it's difficult to scroll through this thread)? Also, can you please provide the full console output for the error?

Hello Mr.Omer,

Thanks a lot for replying. Please find the needful.

#include "DSP28x_Project.h" // Device Headerfile and Examples Include File

#include <math.h>

#include "Solar_F.h"


__interrupt void cpu_timer0_isr(void);
__interrupt void cpu_timer1_isr(void);

void Adc_Config(void);
void EPwm1(void);
void EPwm2(void);
void EPwm3(void);
void gpiosetup (void);


CNTL_PI_F cntl_pi1;


// Global variables
//
Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Vin[10];
Uint16 Vo[10];
Uint16 Iin[10];
Uint16 Io[10];
float duty1=0.4;
float duty2=0.4;
float duty3=0.5;
float Vin_act,Vo_act, Iin_act,Io_act;
float Gv = 155;
float Gi = 2.5;
Uint16 i;

int16 period = 600;
int16 phase = 300;

void main(void)
{

InitSysCtrl();


DINT;


InitPieCtrl();


IER = 0x0000;
IFR = 0x0000;


InitPieVectTable();


EALLOW; 
PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.TINT1 = &cpu_timer1_isr;
// PieVectTable.ADCINT1 = &adc_isr;
EDIS; // This is needed to disable write to EALLOW protected registers

//
// Step 4. Initialize all the Device Peripherals:
//
InitAdc(); // For this example, init the ADC
InitCpuTimers();

ConfigCpuTimer(&CpuTimer0, 60, 100);
ConfigCpuTimer(&CpuTimer1, 60, 8.33);

CpuTimer0Regs.TCR.all = 0x4000;
CpuTimer1Regs.TCR.all = 0x4000;
IER |= M_INT1;
IER |= M_INT13;
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
PieCtrlRegs.PIEIER1.bit.INTx6 =1;

gpiosetup ();
EPwm1();
EPwm2();
EPwm3();

CNTL_PI_F_init(&cntl_pi1);
cntl_pi1.Ki = (0.1);
cntl_pi1.Kp = (0.2);
cntl_pi1.Umax = (0.25);
cntl_pi1.Umin = (0.025);

EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;

EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;


EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

LoopCount = 0;
ConversionCount = 0;

//
// Configure ADC
// Note: Channel ADCINA4 will be double sampled to workaround the
// ADC 1st sample issue for rev0 silicon errata
//
EALLOW;
AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch
AdcRegs.INTSEL1N2.bit.INT1E = 1; // Enabled ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT = 0; // Disable ADCINT1 Continuous mode
AdcRegs.INTSEL1N2.bit.INT1SEL = 2; // setup EOC2 to trigger
// ADCINT1 to fire

//
// set SOC0 channel select to ADCINA0 and SOC 1 -A1, SOC 2 -A2, SOC 3 -A3, SOC 4 -A4
// (dummy sample for rev0 errata workaround)
//
AdcRegs.ADCSOC0CTL.bit.CHSEL = 0;
AdcRegs.ADCSOC1CTL.bit.CHSEL = 1; //set SOC1 channel select to ADCINA1
AdcRegs.ADCSOC2CTL.bit.CHSEL = 2; //set SOC2 channel select to ADCINA2
AdcRegs.ADCSOC3CTL.bit.CHSEL = 3;
AdcRegs.ADCSOC4CTL.bit.CHSEL = 4;
//
// set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts
// first then SOC1, SOC1,2, 3 then SOC3
//
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5;
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5;
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5;
AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5;
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5;
//
// set SOC0.SOC1,2, 3,4 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
//
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6;
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6;
AdcRegs.ADCSOC2CTL.bit.ACQPS = 6;
AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;
AdcRegs.ADCSOC4CTL.bit.ACQPS = 6;
EDIS;

for(;;);
// {
// LoopCount++;
// }
}


__interrupt void cpu_timer0_isr(void)
{

Vin[ConversionCount] = AdcResult.ADCRESULT0;
Vo[ConversionCount] = AdcResult.ADCRESULT1;
Iin[ConversionCount] = AdcResult.ADCRESULT2;
Io[ConversionCount] = AdcResult.ADCRESULT4;
Vin_act=(Vin[ConversionCount]*Gv*3.3)/4095;
Vo_act=(Vo[ConversionCount]*Gv*3.3)/4095;
Iin_act=(Iin[ConversionCount]*Gi*3.3)/4095;
Io_act=(Io[ConversionCount]*Gi*3.3)/4095;


cntl_pi1.Ref = (1.0);
cntl_pi1.Fbk = (0.1);
CNTL_PI_F_FUNC(&cntl_pi1);


// EPwm1Regs.CMPA.half.CMPA = (EPwm1Regs.TBPRD)*duty;
EPwm1Regs.CMPA.half.CMPA = (EPwm1Regs.TBPRD)*duty1;
EPwm2Regs.CMPA.half.CMPA = (EPwm2Regs.TBPRD)*duty2;
// EPwm3Regs.CMPA.half.CMPA = (EPwm3Regs.TBPRD)*duty3;

//
// If 20 conversions have been logged, start over
//
if(ConversionCount == 9)
{
ConversionCount = 0;
}
else
{
ConversionCount++;
}

//
// Clear ADCINT1 flag reinitialize for next SOC
//
if(i==9)
{
i=0;
}
else
{
i++;
}
// AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
CpuTimer0.InterruptCount++;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE

return;
}

__interrupt void cpu_timer1_isr(void)
{

EPwm3Regs.CMPA.half.CMPA = (EPwm3Regs.TBPRD)*duty3;
CpuTimer1.InterruptCount++;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE

return;
}

void EPwm1()
{
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event

// actual*****


EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE; // set Immediate load
EPwm1Regs.TBPRD = period/2; // PWM frequency = 1 / period
EPwm1Regs.TBPHS.half.TBPHS = 0;
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // sync "down-stream"

// Counter Compare Submodule Registers
EPwm1Regs.CMPA.half.CMPA = 0; // set duty 0% initially
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_PRD;

// Action Qualifier SubModule Registers
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1Regs.AQCTLA.bit.CAD = AQ_SET;

}

void EPwm2()
{
EPwm2Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;
// EPwm2Regs.CMPA.half.CMPA = 300; // Set compare A value
EPwm2Regs.TBPRD = period/2; // Set period for ePWM1


EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000; // Clear counter

EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
// EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;

EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // sync "down-stream"

//code for phase shift start
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

if ((0 <= phase)&&(phase <= 2))
{
EPwm2Regs.TBPHS.half.TBPHS = (2-phase);
EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP; // set to count up after sync
}
else if ((2 < phase)&&(phase <= period/2))
{
EPwm2Regs.TBPHS.half.TBPHS = (phase-2);
EPwm2Regs.TBCTL.bit.PHSDIR = TB_DOWN; // set to count down after sync
}
else if ((period/2 < phase)&&(phase <= period))
{
EPwm2Regs.TBPHS.half.TBPHS = (period-phase+2);
EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP; // set to count up after sync
}
EPwm2Regs.CMPA.half.CMPA = 0;
//code for phase shift end

EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
// EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_PRD;

EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Set PWM1A on CAU
EPwm2Regs.AQCTLA.bit.CAD = AQ_SET; // Clear PWM1A on CAD


}

void EPwm3()
{
//
EPwm3Regs.TBCTL.bit.CLKDIV = 0x000;
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 0x001;
EPwm3Regs.TBCTL.bit.CTRMODE = 2;

EPwm3Regs.AQCTLA.all = 0x0060;
EPwm3Regs.AQCTLB.all = 0x0090;
EPwm3Regs.CMPA.half.CMPA = 67; // Set compare A value
EPwm3Regs.TBPRD = 125;

EPwm3Regs.DBFED = 10;
EPwm3Regs.DBRED = 10;

EPwm3Regs.DBCTL.bit.OUT_MODE = 3;
EPwm3Regs.DBCTL.bit.POLSEL = 2;
EPwm3Regs.DBCTL.bit.IN_MODE = 0;

}
void gpiosetup(void)
{
EALLOW;

GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A)
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1; // Disable pull-up on GPIO1 (EPWM1B)
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;

GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; // Disable pull-up on GPIO2 (EPWM2A)
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1; // Disable pull-up on GPIO3 (EPWM2B)
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // Configure GPIO2 as EPWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;

GpioCtrlRegs.GPAPUD.bit.GPIO4 = 1; // Disable pull-up on GPIO4 (EPWM3A)
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1; // Disable pull-up on GPIO5 (EPWM3B)
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // Configure GPIO4 as EPWM3A
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;

EDIS;

This is the console file.

**** Build of configuration Debug for project ADCinterleaved2 ****

"C:\\ti\\ccs1220\\ccs\\utils\\bin\\gmake" -k all

Building target: "Example_2803xAdcSoc.out"
Invoking: C2000 Linker
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla0 --define=_DEBUG --define=LARGE_MODEL -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet -z -m"Example_2803xAdcSoc.map" --stack_size=0x300 --warn_sections -i"C:/ti/controlSUITE/libs/app_libs/solar/v1.2/float/include" -i"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib" -i"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" -i"C:/Users/drjppram/workspace_v12/ADCinterleaved2" -i"C:/ti/controlSUITE/libs/app_libs/solar/v1.2/float/source" -i"C:/ti/C2000Ware_5_01_00_00/device_support/f2803x/common/lib" -i"C:/ti/C2000Ware_5_01_00_00/libraries/math/IQmath/c28/lib" --reread_libs --issue_remarks --verbose_diagnostics --xml_link_info="Example_2803xAdcSoc_linkInfo.xml" --entry_point=code_start --rom_model -o "Example_2803xAdcSoc.out" "./ADCinterleaved2.obj" "./DSP2803x_Adc.obj" "./DSP2803x_CodeStartBranch.obj" "./DSP2803x_CpuTimers.obj" "./DSP2803x_DefaultIsr.obj" "./DSP2803x_EPwm.obj" "./DSP2803x_GlobalVariableDefs.obj" "./DSP2803x_PieCtrl.obj" "./DSP2803x_PieVect.obj" "./DSP2803x_SysCtrl.obj" "./DSP2803x_usDelay.obj" "C:/ti/C2000Ware_5_01_00_00/device_support/f2803x/common/cmd/28035_RAM_lnk.cmd" "C:/ti/C2000Ware_5_01_00_00/device_support/f2803x/headers/cmd/DSP2803x_Headers_nonBIOS.cmd" "C:/ti/controlSUITE/libs/math/IQmath/v160/lib/IQmath.lib" "C:/ti/controlSUITE/device_support/f2803x/v126/DSP2803x_common/lib/SFO_TI_Build_V6b.lib" "../Solar_Lib_Float.lib" "C:/ti/controlSUITE/libs/app_libs/solar/v1.2/IQ/lib/Solar_Lib_IQ.lib" -l"C:/ti/controlSUITE/libs/app_libs/solar/v1.2/float/lib/Solar_Lib_Float.lib" -lrts2800_ml.lib -lIQmath.lib

>> Compilation failure
makefile:151: recipe for target 'Example_2803xAdcSoc.out' failed
error: file "../Solar_Lib_Float.lib<CNTL_PI_F.obj>" specifies ISA revision
"C28FPU32", which is not compatible with ISA revision "C2800" specified in a
previous file or on the command line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<boot28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<fs_div28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<fs_mpy28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<fs_tol28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<fs_tou28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<u_tofs28.asm.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<cpy_tbl.c.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<memcpy.c.obj>" specifies ISA revision "C2800", which is not compatible with
ISA revision "C2700" specified in a previous file or on the command line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<pre_init.c.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<startup.c.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<exit.c.obj>" specifies ISA revision "C2800", which is not compatible with
ISA revision "C2700" specified in a previous file or on the command line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<_lock.c.obj>" specifies ISA revision "C2800", which is not compatible with
ISA revision "C2700" specified in a previous file or on the command line
error: file
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib/rts2800_ml.lib
<args_main.c.obj>" specifies ISA revision "C2800", which is not compatible
with ISA revision "C2700" specified in a previous file or on the command
line
warning: could not resolve index library "IQmath.lib" to a compatible library
error: errors encountered during linking; "Example_2803xAdcSoc.out" not built
gmake: *** [Example_2803xAdcSoc.out] Error 1
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

Dear Omar, 

Thanks a lot for approrpriately responding to my query. I resolved the error in linking. However, I couldnt get the problem in resolving the PI controller issue. I am seeing the following console as below in the CCS, soon I use solar (float) header file in the code. I am sorry to bug a lot, can you kindly suggest me something here to resolve this. 

**** Build of configuration Debug for project ADCinterleaved2 ****

"C:\\ti\\ccs1220\\ccs\\utils\\bin\\gmake" -k all 
 
Building file: "../ADCinterleaved2.c"
Invoking: C2000 Compiler
"C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla0 --include_path="C:/ti/controlSUITE/libs/app_libs/solar/v1.2/float/include" --include_path="C:/ti/controlSUITE/libs/app_libs/solar/v1.2/float/source" --include_path="C:/ti/controlSUITE/libs/math/IQmath/v160/include" --include_path="C:/ti/controlSUITE/libs/math/IQmath/v160/lib" --include_path="C:/ti/controlSUITE/libs/control/DCL/v1_00_00_00/include" --include_path="C:/ti/controlSUITE/libs/control/DCL/v1_00_00_00/source" --include_path="C:/ti/controlSUITE/libs/app_libs/solar/v1.2/IQ/include" --include_path="C:/ti/controlSUITE/libs/app_libs/solar/v1.2/IQ/source" --include_path="C:/ti/ccs1220/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --include_path="C:/ti/C2000Ware_5_01_00_00/device_support/f2803x/headers/include" --include_path="C:/ti/controlSUITE/libs/math/FPUfastRTS/V100/include" --include_path="C:/ti/C2000Ware_5_01_00_00/device_support/f2803x/common/include" --include_path="C:/ti/C2000Ware_5_01_00_00/libraries/math/IQmath/c28/include" --define=_DEBUG --define=LARGE_MODEL -g --diag_suppress=10063 --diag_warning=225 --issue_remarks --verbose_diagnostics --quiet --preproc_with_compile --preproc_dependency="ADCinterleaved2.d_raw"  "../ADCinterleaved2.c"
 
>> Compilation failure
subdir_rules.mk:9: recipe for target 'ADCinterleaved2.obj' failed
"C:\ti\controlSUITE\libs\app_libs\solar\v1.2\float\include\MPPT_INCC_I_F.h",
          line 28: error: invalid redeclaration of type name
          "MPPT_INCC_I_handle" (declared at line 28 of
          "C:\ti\controlSUITE\libs\app_libs\solar\v1.2\IQ\include\MPPT_INCC_I_I
          Q.h")
  typedef MPPT_INCC_I_F *MPPT_INCC_I_handle;
                         ^
 
"C:\ti\controlSUITE\libs\app_libs\solar\v1.2\float\include\PID_GRANDO_F.h",
          line 41: error: invalid redeclaration of type name "PID_handle"
          (declared at line 41 of
          "C:\ti\controlSUITE\libs\app_libs\solar\v1.2\IQ\include\PID_GRANDO_IQ
          .h")
  typedef PID_GRANDO_F_CONTROLLER	*PID_handle;
                                 	 ^
 
2 errors detected in the compilation of "../ADCinterleaved2.c".
gmake: *** [ADCinterleaved2.obj] Error 1
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

Dear Omar,

I am sorry to bug a lot on this, though I was not able to run Solar_F library,  the code was succesfully built with Solar_IQ library; however, PI controller was not functioning. when I checked the controller using break points, I got pooped with the dialog box witht he message (although the code was compiled)

"Can't find a source file at "C:\Git\development\libs\app_libs\solar\v1.2\IQ\source\Debug/../CNTL_PI_IQ.c"
Locate the file or edit the source lookup path to include its location."

I kinldy request you to kindly see the picture that I have attached below, I understand that PI controller is declared but not being functioned. Please correct me if I am wrong. Regarding the access to solar_F libraries, I also tried changing float execution (FPU32) in the C2000 compiler; yet, I was not being succesfull to access them. Kindly suggest (help) me some alternative way to the solar float library and Solar_IQ library. Would be really grateful, if I get some way to execute them. 

Many Thanks,

Prasanth Ram