Hi Champ,
I am asking for my customer.
As TRM section 3.5.4.3, it tells the procedures of disabling interrupts.
It specifies Enable interrupts globally (EINT or CLRC INTM) in step 6 after clearing all the IER/IFR in PIE stage and CPU stage in previous step 2~5.
(1). Why it is needed to additionally Enable interrupts globally in the end for disabling interrupts ? In my understanding, as soon as the step 2~5 are done, it should disable the peripheral's interrupt request propagating to CPU, correct ? Is the step 6 a must need to do or a suggestion to do ?
(2). If step 6 isn't done by user for disabling interrupts, what problem would it cause when we try to re-enable interrupts as the procedure specified in section 3.5.4.1 Enabling Interrupts following ?
Thanks and regards,
Johnny