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TMS320F28386D-Q1: Help selecting dedicated CLB pins for BiSS implementation on F28386

Part Number: TMS320F28386D-Q1

Hello,

I plan on assigning two SPI blocks to implement two independent BiSS channels in a design using a TMS320F28386.

I am following the example in the C2000 Position Manager BISS-C Library User's Guide:

In that example (implemented on an F2837D, GPIO6 and GPIO7 are sourced from a CLB.

Those two GPIO can be mapped to Output X-BAR but they are not mapped to CLB Output X-BAR.

Seems to me since those are sourced from a CLB tile and per the diagram below, the GPIO selected should be mapped to CLB Output X-BAR.

But that's not what's done in the example so I'm unclear on how I should assign pins in my design. I'm not clear on how the BISSC_CLK and SPICLK (loop back signal) can be routed to the outside of the chip if not using CLB Output X-BAR. What am I missing?

Thanks!

Jason

  • Hi Jason,

    The Output XBAR on F2838 has access to some of the CLB outputs but not all. The CLB Output XBAR is meant for CLB Outputs specifically, with the addition of some other signals.

    Depending on which CLB outputs you want to route to which GPIOs, either Output XBAR or CLB Output XBAR may be acceptable.

    Thank you,

    Luke