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TMS320F28388D: non master CLA read violation

chao huo
Prodigy 80 points
Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hello Supports Team,

I have the test setup based on the example provided by TI: generateNonMasterCLAReadViolation from C2000Ware_4_01_00_00\libraries\diagnostic\f2838x\examples\sdl_ex_ram_access_protect.c.

In the linker script, i have the ls6Data linked in LS0, and LS0 is set to CPU only. LS1 has the .scratchpad and set to CLA data. LS5, LS6, LS7 is set to CLA programm, Cla1Task1 has run address in LS5.

But during testing i notice the test only pass when in debugging session, when i unplug the debugger, power cycle the HW, attach the debugger again, i see the test failed.

What can be the reason?

Thanks.

BR

Chao

  • 0
    TI__Expert 5060 points

    Hello,

    Just to clarify, you made changes to the f2838x_ram_access_protect_ram_lnk_cpu1.cmd file, is that correct? If you try the power cycle with the original linker cmd file, do you see the same issue?

    Best Regards,

    Delaney

  • 0 in reply to Delaney Woodward
    Prodigy 80 points

    Hello,

    sorry it was failure from my side. I did not pay attention that CLA can run code only from RAM. I copied the code from flash to RAM and CLA task can run and the test functions correctly.

    Another question related to the non master CLA read violation. In the test code from TI it is harded coded in the CLA task that a variable is read. For reference, the code is pasted here.

    #include <stdint.h>

    extern volatile uint32_t ls6Data;

    /* Cla1TaskForSRAM10 - Task code to do a read of a variable to which it shouldn't have access. */

    __attribute__((interrupt)) void Cla1TaskForSRAM10(void)
    {
        uint32_t test;
        test = ls6Data;
        test++;
    }
    The ls6Data can only be located in one specific LS RAM section, e.g. ls0, during the compile & linking time. So it means only one LS RAM section can be tested. 
     
    If all the LS RAM section need to be tested, multile global variable can be defined for each LS RAM section, e.g. ls0Data is located in LS0 RAM, ls1Data is located in LS1 RAM, and so on. I think this way would work, i have not yet tried.
    Another way i have tried is to define the global ls6Data as uint32_t pointer, so during the runtime the pointer can be configured to point to different LS RAM sections. The code would be:
    #include <stdint.h>
    extern volatile uint32_t* lsDataPtr;
    /* Cla1TaskForSRAM10 - Task code to do a read of a variable to which it shouldn't have access. */
    __attribute__((interrupt)) void Cla1TaskForSRAM10(void)
    {
        uint32_t test;
        test = *lsDataPtr;
        test++;
    }

    For example, during the run time before the test run, lsDataPtr can be assigned with starting address of LS0, 0x00008000, then the LS0 RAM is configured to be CPU only. When the test runs, the expectation is the CLA reads the content at 0x00008000 and non master CLA read violation is triggered. But the violation is not triggered. 

    What is the reason? 

    Thanks. 

  • 0 in reply to chao huo
    TI__Expert 5060 points

    Hello,

    Glad you were able to resolve the original issue. You are correct, the CLA must run code from an LSRAM that it has access to. For the F2838x, the CLA's have access to all the LSRAMs 1-7 (this information can be found in the Functional Block Diagram of the device datasheet). 

    Which example code are you showing here? Can you provide the C2000ware path, and I will take a look?

    Best Regards,

    Delaney

  • 0 in reply to Delaney Woodward
    Prodigy 80 points

    c2000\C2000Ware_4_01_00_00_STL\libraries\diagnostic\f2838x\examples\sdl_ex_ram_access_protect\f2838x_sdl_ex_ram_access_cla_read.cla