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Tool/software:
Hi experts,
Good day! I am asking for my customer.
My customer found that in the CLA example "cla_ex4_pwm_control". The LS0 RAM is allocated in CLA program memory, but the "Access Protection for RAMs" is configurated as "CPU fetch allowed, CPU write allowed".
But in the TRM it's mentioned that "the CPU will only have access if the memory is configured as data RAM for the CLA".
In this demo, LS0 RAM is allocated to CLA but the Access Protection for RAMs of LS0 RAM allows CPU fetches. Does this initialization configuration need to be changed here?
Thanks!!
Best Regards
Kita
Hi Kita,
The setting in the LSxMSEL register (to allocate the LS0 memory to the CLA) should override any of the options in the LSxACCPROT0 register, which is what is configured by the "Access Protection for RAMs" dropdowns in Sysconfig. The LSxACCPROT0 options should only actually block CPU fetches and writes if the memory can be accessed by the CPU. So, the "Access Protection for RAMs" should not have an effect in this case, no matter what the CPU will not have access once LS0 is allocated to the CLA.
Best Regards,
Delaney