Part Number: TMS320F280036C-Q1
Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
Hi experts,
Good day! I am asking for customer.
Now the customer is using EPWM to trigger ADC, ADC will converse a single channel. After that EOC will trigger interrupt.
The configuration like that: The ADC clock is 60MHz; sample window in Sysconfig is 9 so ACQPS=9; Use single sampling mode;
Here is the test result:
1. with early interrupt: INTPULSEPOS=0, from EPWM trigger to ADC interrupt(use a GPIO toggle in interrupt service) will take 400ns.
2. with late interrupt: INTPULSEPOS=0, from EPWM trigger to ADC interrupt(use a GPIO toggle in interrupt service) will take 500ns.
These test result is far from the theoretical values. Theoretically, the time of late interrupt should be equal to tSH+tEOC = (9+21)/60MHz=250ns. The time of both interrupt are much longer than theoretical value. Could you give some advices of this issue? Or should there be certain times that need to be considered?
Thanks!
Best Regards
Kita
