TMS320F2800157: F2800157 TRM (SPRUIY4B) DCC example 1 error

Tool/software:

8.2.1 Configuring DCC Counters
Counter0 and Counter1 are configured based on the ratio between the frequencies of Clock0 and Clock1
(Fclk1×Counter0 = Fclk0×Counter1). The Valid0 counter provides tolerance and is configured based on the
error in DCC. Since Clock0 and Clock1 are asynchronous, the start and stop of the counters do not occur
synchronously. Hence, while configuring the counters, two different sources of errors must be accounted for:
• DCC Errors due to the asynchronous timing of Clock0 and Clock1: this depends on the frequency of Clock0
and Clock1:
– If Fclk1 > Fclk0, then Async. Error (in Clock0 cycles) = 2 + 2×(Fsysclk/Fclk0)
– If Fclk1 < Fclk0, then Async. Error (in Clock0 cycles) = 2×(Fclk0/Fclk1) + 2×(Fsysclk/Fclk0)
– If Fclk1 is unknown, then Async. Error (in Clock0 cycles) = 2 + 2×(Fsysclk/Fclk0)
• Digitization Error = 8 Clock0 cycles
DCC Error (in Clock0 Cycles) = Async. Error + Digitization Error

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8.2.2 Single-Shot Measurement Mode
The DCC module can be programmed to count down one time by enabling the single-shot mode. In this mode,
the DCC stops operating when the down counter0 and the valid counter0 reach 0.
At the end of one sequence of counting down in this single-shot mode, the DCC gets disabled automatically,
which prevents further counting. This mode is typically used for spot-checking the frequency of a signal.
Example-1: Validating PLLRAWCLK frequency
A practical example of the usage is to validate the PLL output clock frequency using the XTAL as the reference
clock. Assume XTAL is 10MHz, PLL output frequency is 100MHz, SYSCLK is 100MHz, allowable Frequency
Tolerance is 0.1%, and DCC Tolerance required is 0.1%. The measurement sequence proceeds as follows:
• Set Clock0 source for Counter0 and Valid0 as XTAL, and Clock1 source for Counter1 as PLL output clock.
• Based on the equations defined in Section 8.2.1, calculated seed values for Counters can be Counter0 =
29940; Valid0 = 120; Counter1 = 300000
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It seems that the example 1 does not count the "Digitization Error" (8):

Compare correct calculation with example 1:

Wrong DCC Error in example 1 = 2 + 2 * (100MHz/10MHz) = 30

Correct DCC Error = 2 + 2 * (100MHz/10MHz) + 8 = 38

Wrong Window in example 1= 30 / (0.01 * 0.1) = 30000

Correct Window = 38 / (0.01 * 0.1) = 38000

Wrong Freq Error Allowed in example 1= 30

Correct Freq Error Allowed = 38

Wrong Total Error  in example 1= 30 + 30 = 60

Correct Total Error = 38 + 38 = 76

Wrong Counter 0  in example 1= Window - Total Error = 30000 - 60 = 29940

Correct Counter 0 = Window - Total Error = 37924