Other Parts Discussed in Thread: TMS320F28335,
Tool/software:
Hi All,
I am using TMS320F28335 as master and TMS320F28379D as slave in SPI communication. Initially, I did run the example loop back with an interrupt code on both controllers separately, and they did work fine. Later, I adjusted code in TMS28335 to just transmit data and TMS28379D to receive data. The edited codes for master and slave are given below.
Master:
//
// Included Files
//
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
//
// Function Prototypes
//
//__interrupt void ISRTimer2(void);
__interrupt void spiTxFifoIsr(void);
void delay_loop(void);
void spi_fifo_init(void);
void error();
//
// Globals
//
Uint16 sdata; // Send data buffer
//
// Keep track of where we are in the data stream to check received data
//
Uint16 rdata_point;
//
// Main
//
void main(void)
{
Uint16 i;
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
// InitGpio(); // Skipped for this example
//
// Setup only the GP I/O only for SPI-A functionality
//
InitSpiaGpio();
//
// Step 3. Initialize PIE vector table:
// Disable and clear all CPU interrupts
///
DINT;
IER = 0x0000;
IFR = 0x0000;
//
// Initialize PIE control registers to their default state:
// This function is found in the DSP2833x_PieCtrl.c file.
//
InitPieCtrl();
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
// PieVectTable.SPIRXINTA = &spiRxFifoIsr;
PieVectTable.SPITXINTA = &spiTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
//
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
//
// InitPeripherals(); // Not required for this example
spi_fifo_init(); // Initialize the SPI only
//
// Step 5. User specific code, enable interrupts:
//
//
// Initialize the send data buffer
//
// for(i=0; i<16; i++)
// {
// sdata[i] = i;
// }
// rdata_point = 0;
//
// Enable interrupts required for this example
//
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER6.bit.INTx1=1; // Enable PIE Group 6, INT 1
PieCtrlRegs.PIEIER6.bit.INTx2=1; // Enable PIE Group 6, INT 2
IER=0x20; // Enable CPU INT6
EINT; // Enable Global Interrupts
//
// Step 6. IDLE loop. Just sit and loop forever (optional)
//
for(;;);
}
//
// Some Useful local functions
//
//
// delay_loop -
//
void
delay_loop()
{
long i;
for (i = 0; i < 1000000; i++)
{
}
}
//
// error -
//
void
error(void)
{
__asm(" ESTOP0"); //Test failed!! Stop!
for (;;);
}
//
// spi_fifo_init -
//
void
spi_fifo_init()
{
//
// Initialize SPI FIFO registers
//
SpiaRegs.SPICCR.bit.SPISWRESET=0; // Step 1: Reset SPI
SpiaRegs.SPICCR.all=0x002F; // 16-bit character, Looping is disabled
SpiaRegs.SPICTL.all=0x0006; // Interrupt dis-abled, Master/Slave XMIT enable0
SpiaRegs.SPISTS.all=0x0000; // Clearing SPI flags (OVERRUN_FLAG, INT_FLAG).
SpiaRegs.SPIBRR=0x004A; // Baud rate
SpiaRegs.SPIFFTX.all=0xE068; // Previous: C021 Enable FIFO's, set TX FIFO level to 8
// SpiaRegs.SPIFFRX.all=0x6068; // Set RX FIFO level to 8
SpiaRegs.SPIFFCT.all=0x00;
SpiaRegs.SPIPRI.all=0x0010; // Set FREE bit: Halting on a breakpoint will not halt the SPI
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SPI
// SpiaRegs.SPIFFTX.bit.TXFIFO=1;
// SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
}
//
// spiTxFifoIsr -
//
__interrupt void
spiTxFifoIsr(void)
{
Uint16 i;
// for(i=0;i<16;i++)
// {
// SpiaRegs.SPITXBUF=sdata[i]; // Send data
// }
//
// for(i=0;i<16;i++) // Increment data for next cycle
// {
// sdata[i] = sdata[i]+ 1;
// }
sdata = 8;
SpiaRegs.SPITXBUF=sdata;
SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ACK
}
////
//// spiRxFifoIsr -
////
//__interrupt void
//spiRxFifoIsr(void)
//{
// Uint16 i;
// for(i=0;i<8;i++)
// {
// rdata[i]=SpiaRegs.SPIRXBUF; // Read data
// }
//
// for(i=0;i<8;i++) // Check received data
// {
// if(rdata[i] != rdata_point+i)
// {
// error();
// }
// }
// rdata_point++;
// SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1; // Clear Overflow flag
// SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
// PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
//}
//
// End of File
//
Slave :
//
// Included Files
//
#include "F28x_Project.h"
//
// Globals
//
Uint16 sdata[2]; // Send data buffer
Uint16 rdata; // Receive data buffer
Uint16 rdata_point; // Keep track of where we are
// in the data stream to check received data
Uint16 i;
//
// Function Prototypes
//
interrupt void spiTxFifoIsr(void);
interrupt void spiRxFifoIsr(void);
void delay_loop(void);
void spi_fifo_init(void);
void error();
//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// Setup only the GP I/O only for SPI-A functionality
//
InitSpiaGpio();
//
// Step 4. Initialize the Device Peripherals:
//
spi_fifo_init(); // Initialize the SPI only
//
// Step 3. Initialize PIE vector table:
// Disable and clear all CPU interrupts
//
DINT;
IER = 0x0000;
IFR = 0x0000;
//
// Initialize PIE control registers to their default state:
// This function is found in the F2837xD_PieCtrl.c file.
//
InitPieCtrl();
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SPIA_RX_INT = &spiRxFifoIsr;
// PieVectTable.SPIA_TX_INT = &spiTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
//
// Step 5. User specific code, enable interrupts:
//
////
//// Initialize the send data buffer
////
// for(i=0; i<2; i++)
// {
// sdata[i] = i;
// }
rdata_point = 0;
//
// Enable interrupts required for this example
//
// IER = 0x20; // Enable CPU INT6 (SPI interrupt group)
// PieCtrlRegs.PIEIER6.bit.INTx2 = 1; // Enable PIE Group 6, INT 2 (SPI RX)
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
// PieCtrlRegs.PIEIER6.bit.INTx1 = 1; // Enable PIE Group 6, INT 1
PieCtrlRegs.PIEIER6.bit.INTx2 = 1; // Enable PIE Group 6, INT 2
IER |= M_INT6; // Enable INT6 in CPU; // Enable CPU INT6
EINT; // Enable Global Interrupts
//
// Step 6. IDLE loop. Just sit and loop forever (optional):
//
for(;;);
}
//
// delay_loop - Function to provide delay
//
void delay_loop()
{
long i;
for (i = 0; i < 1000000; i++) {}
}
//
// error - Function to halt debugger on error
//
void error(void)
{
asm(" ESTOP0"); //Test failed!! Stop!
for (;;);
}
//
// spi_fifo_init - Initialize SPI FIFO
//
void spi_fifo_init()
{
//------ Modified code ------------------------
//
// Initialize SPI FIFO registers
//
SpiaRegs.SPICCR.bit.SPISWRESET=0; // Step 1: Reset SPI
SpiaRegs.SPICCR.all=0x002F; // 16-bit character, Looping is disabled
SpiaRegs.SPICTL.all=0x0000; // Interrupt dis-abled, Master/Slave XMIT enable0
SpiaRegs.SPISTS.all=0x0000; // Clearing SPI flags (OVERRUN_FLAG, INT_FLAG).
SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = 99; // Baud rate
SpiaRegs.SPIFFTX.all=0xE068; // Previous: C021 Enable FIFO's, set TX FIFO level to 8
// SpiaRegs.SPIFFTX.bit.SPIFFENA = 1; // FIFO enhancement mode ON
SpiaRegs.SPIFFRX.all=0x6069; // Set RX FIFO level to 8
SpiaRegs.SPIFFCT.all=0x00;
SpiaRegs.SPIPRI.all=0x0010; // Set FREE bit: Halting on a breakpoint will not halt the SPI
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SPI
// //------ Below code is original code ------------------------
// //
// // Initialize SPI FIFO registers
// //
// SpiaRegs.SPIFFTX.all = 0xC028; // Enable FIFOs, set TX FIFO level to 8
// SpiaRegs.SPIFFRX.all = 0x0028; // Set RX FIFO level to 8
// SpiaRegs.SPIFFCT.all = 0x00;
//
SpiaRegs.SPIFFTX.bit.TXFIFO=1;
SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
//
//// //
//// // Initialize core SPI registers
//// //
// InitSpi();
}
////
//// spiTxFifoIsr - ISR for SPI transmit FIFO
////
//interrupt void spiTxFifoIsr(void)
//{
// Uint16 i;
// for(i=0;i<2;i++)
// {
// SpiaRegs.SPITXBUF=sdata[i]; // Send data
// }
//
// for(i=0;i<2;i++) // Increment data for next cycle
// {
// sdata[i] = sdata[i] + 1;
// }
//
// SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1; // Clear Interrupt flag
// PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ACK
//}
//
// spiRxFifoIsr - ISR for SPI receive FIFO
//
interrupt void spiRxFifoIsr(void)
{
// Uint16 i;
//
// for(i=0; i<8; i++)
// {
// rdata[i]=SpiaRegs.SPIRXBUF; // Read data
// }
rdata = SpiaRegs.SPIRXBUF; // Read data
// for(i=0; i<2; i++) // Check received data
// {
// if(rdata[i] != rdata_point+i)
// {
// error();
// }
// }
// rdata_point++;
SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1; // Clear Overflow flag
SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
}
//
// End of file
//
The problem here is that Master is able to transmit the data. which I cross-checked by measuring signals across CLK, SIMO pins, and the slave select line. but slave is unable to receive data. Could you please let me know if I am doing anything wrong in modifying code or anything else I have to change?
