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TMS320F280039: The first pulse of EPWM appears to be simultaneously high。

Zhen He
Intellectual 360 points
Part Number: TMS320F280039
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello, ti engineers,

I used the EPWM module to generate the 200KHz waveform, using the increase and decrease count mode, and did not use the DB module. EPWM-A is high at 0 and UA is low. EPWM-B is low at 0 and DB, and TBPRD is high. However, when I use the oscilloscope to capture the EPWM waveform, I find that the first waveform issued by EPWM-A and EPWM-B is the same high level, may I ask why this is caused?

  • 0
    TI__Intellectual 1630 points

    Hi Zhen,

    Could you please elaborate it a little bit and share the requirements you are feeding to generate this waveform. A snapshot of code (or sysconfig) would be helpful to understand better.

    Thanks

    Srikanth

  • 0 in reply to Srikanth Yerra
    Intellectual 360 points

    Hi Srikanth,

    The following is my code when configuring the EPWM module, I want to get a 200KHz waveform. However, after the initial power-on, I captured the waveforms of EPWM-A and EPWM-B through the oscilloscope, and the first waveform appeared with two full heights. But from the code point of view should not appear, because in Up phase A has an output, in Down phase B has an output.

  • 0 in reply to Srikanth Yerra
    Intellectual 360 points

    Hi Srikanth,

    I guess my problem is different from his：

    First, his EPWMxB in output is first high, and then EPWMxB output is also high due to the delay caused by the switch from 0 to 1 of DBCTL[POLSEL] 's S3. But from the code I uploaded, first of all, I did not use the DB module, and my action for EPWMB at ZERO is LOW, so I think it is different from his situation.
    Second, there is no follow-up communication in the post to explain how high pulse came about.

  • 0 in reply to Zhen He
    TI__Intellectual 1630 points

    Hi Zhen,

    I have found this document in which this type of issue is discussed. Please evaluate the document and see if this is your issue.

    https://www.ti.com/lit/an/spraai1/spraai1.pdf?ts=1740590140592 

    Thanks

    Srikanth

  • 0 in reply to Srikanth Yerra
    Intellectual 360 points

    Hi Srikanth,

    Thank you for helping me find relevant information, but I haven't seen the similarity with my problem. And when I looked at the uploaded waveforms, I noticed another problem. From my code Settings, the high level of EPWM-A should exist only 1/600/200K ≈ 8.3ns, but it seems that the high level time is 16ns.

  • 0 in reply to Zhen He
    TI__Mastermind 23810 points

    Hi Zhen,

    Where are you starting your EPWM clock within your initializations (clearing and setting the TBCLKSYNC bit)? Are you seeing this occur at the very beginning (as soon as you start the EPWM clock)?

    If you wanted, you could change your EPWM emulation mode setting so that the counter pauses when you pause during a debug session (not set to free run)? Once you do this, can you step through your initializations until you step over that TBCLKSYNC bit to start your clock and confirm the glitch occurs after you start your EPWM clock. 

    Also, what speed is your EPWM clock running at? Are you using a launchpad or Controlcard?

    Best Regards,

    Allison

  • 0 in reply to Allison Nguyen
    Intellectual 360 points

    Hi Allison,

    I use an IO port to indicate when I disable TBCLKSYNC and when I enable TBCLKSYNC. The first image indicates that I first generate a falling edge and then enable TBCLKSYNC. The second image indicates that I enabled TBCLKSYNC first and then produced a falling edge.

      

    The rising edge of this graph indicates that I have disabled TBCLKSYNC, and the falling edge indicates that I have enabled TBCLKSYNC.

      As you can see from the above three graphs, I disabled TBCLKSYNC first, then configured EPWM, and finally enabled TBCLKSYNC, sharing 2.468ms. And the first EPWM waveform should have appeared after I enabled TBCLKSYNC.
      Finally, my clock rate is 120MHz, EPWM_CLOCK_DIVICER_1 and EPWM_HSCLOCK_DIVIDER_1 are set on the code. I used the company's control board to directly measure the waveform obtained from the external control of DSP. The specific process was to obtain the waveform after setting the trigger of the oscilloscope and powering on the control board. Besides, EPWM module was not configured in the BOOT, and the configuration was performed after jumping to the APP.
  • 0 in reply to Zhen He
    TI__Mastermind 23810 points

    Hi Zhen,

    I created a simple example using the same configurations as you. Can you please try setting the TBPRD load mode to be "immediate load" mode before configuring TBPRD to be 300? I made this modification and the issue is resolved.

    I believe the EPWM is recognizing TBPRD = 0 (not 300) upon start up of the EPWM counter because TBPRD shadow loading. Hence, the EPWMxB action qualifier is setting channel B high for a short pulse (and this occurs at the same time that EPWMxA is set high according to the TBCTR = 0 match event) which creates the simultaneous initial pulses. You can always change your load mode after initialization if needed.

    Please see the attached project which demonstrates this.

    F28003x_EPWM_E2E.zip

    Best Regards,

    Allison

  • 0 in reply to Allison Nguyen
    Intellectual 360 points

    Hi Allison,

    Yes, after I set it to "immediate load", there is no case of a high level at the same time. This is because in TBPRD shadow loading, TBPRD = 0, TBCTR = 0, for EPWMA, EPWM_AQ_OUTPUT_HIGH_ZERO is satisfied, for EPWMB, Yes, EPWM_AQ_OUTPUT_HIGH_PERIOD is satisfied, so both output high levels, am I correct? If yes, I would like to confirm two questions: 1. For EPWMB, is the priority of TBCTR = ZERO and TBCTR = TBPRD higher than that of the latter? I did not see the introduction of the priority of both in UP-DOWN mode in the technical manual. 2. After TBCLKSYNC was enabled, I adjusted it to shadow loading, and the entire waveform was lost.

  • 0 in reply to Zhen He
    Intellectual 360 points

    For the second question, I think so, because the "Immediate Load Mode" is set, and TBPRD is set to TBPRD(Active), while TBPRD(shadow) is still 0. When I set it to "Shadow Mode", shadow TBPRD(0) → Active TBPRD, so the EPWMA and EPWMB outputs are lower. I should set TBPRD to 300 after setting it to "Shadow Mode".

  • +1 in reply to Zhen He
    TI__Mastermind 23810 points

    Hi Zhen,

    1. The CTR = TBPRD action qualifier takes priority over CTR = 0 action qualifier.

    2.  This error happens because changing the load mode to "shadow mode" in your initialization will load whatever is in the shadow register to your TBPRD (so if your shadow register is empty, '0' is loaded to the TBPRD). Instead, if you want everything in the initializations, you can could do this:

    • Set TBPRD load mode to shadow load
    • Write to TBPRD (this will set the shadow register to 300)
    • Switch to immediate mode
    • Write to TBPRD again (this will set the active register to 300)
    • Switch back to shadow mode (the desired load mode for your project)

    This is what I used and tested successfully:

        EPWM_setPeriodLoadMode(base,EPWM_PERIOD_SHADOW_LOAD);
    EPWM_setTimeBasePeriod(base, 300U);
    EPWM_setPeriodLoadMode(base,EPWM_PERIOD_DIRECT_LOAD);
    EPWM_setTimeBasePeriod(base, 300U);
    EPWM_setPeriodLoadMode(base,EPWM_PERIOD_SHADOW_LOAD);
    EPWM_selectPeriodLoadEvent(base, EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO);

    Best Regards,

    Allison