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TMS320F28035: there will be high pulse during the first EPWM counter period

Howard Zou
Genius 12365 points
Part Number: TMS320F28035

Hi,

my customer is configuring the PWM as shown below:

They would like to achieve that EPWMxB signal on the hardware pin is from EPWMxB in as shown below:

But with this configuration, they will always have a short high pulse on EPWMxB(green line):

No matter how we arrange the code sequence, there will always be such a high pulse on ePWMB pin, how can we make the first cycle ePWMxB pin low?

  • 0
    TI__Mastermind 42195 points

    Howard,

    Can you confirm the source of the high pulse? For example is the short high pulse the width of one Falling Edge Delay FED?

    There certainly is a solution here, but before we try anything too complex lets figure out what is causing this.

    Regards,
    Cody 

  • 0 in reply to Cody Watkins
    TI__Genius 12365 points

    Cody,

    it's not related to the FED.

    as you can see, when we set:

    AQCSFRC.all=0x09, EPWMxB in is high, at this moment, S3=0, EPWMxB pin hardware is logic high.

    And then we set:

    DBCTL.BIT.POLSEL=DB_ACTV_HIC, we set S3=1, then EPWMxB pin hardware is logic low.

    If we put 

    AQCSFRC.all=0x09

    later than

    DBCTL.BIT.POLSEL=DB_ACTV_HIC,

    then S3=1 when EPWMxB in is low, EPWMxB pin hardware is also logic high.

    And then we set 

    AQCSFRC.all=0x09

    EPWMxB in is high, EPWMxB pin hardware is also logic low.

    The problem is that we cannot simultaneous set

    EPWMxB in high together with S3=1.

    Then we would like to know is this high pulse inevitable?

    And why the pulse is 880ns? It should only take cycles that the code execute, and it should be lower than 880ns(about 53 SYSCLK) I guess.

  • 0 in reply to Howard Zou
    TI__Mastermind 42195 points

    Howard,

    I am not entirely sure the source of your problem, something has to be setting the PWM high. I would suggest finding and blocking that event.

    Alternatively have you tried configuring the DB and then enabling the GPIO mux? You can configure the GPIO as an output and force it low while you are setting up the PWM, then enable the PWM to connect to the GPIO.

    Regards,
    Cody 

  • 0 in reply to Cody Watkins
    TI__Genius 12365 points

    Cody,

    I have point out the source of the problem, 

    The problem is that we cannot simultaneous set

    EPWMxB in high together with S3=1.

    As you can see in our code:

    AQCSFRC.all=0x09, //EPWMxB in is high, at this moment, S3=0, EPWMxB pin hardware is logic high.

    DBCTL.BIT.POLSEL=DB_ACTV_HIC, //we set S3=1, then EPWMxB pin hardware is logic low.

    If we reverse the code sequence:

    DBCTL.BIT.POLSEL=DB_ACTV_HIC //S3=1 when EPWMxB in is low, EPWMxB pin hardware is also logic high.

    AQCSFRC.all=0x09 //EPWMxB in is high, EPWMxB pin hardware is also logic low.

    The problem is that we cannot simultaneous set

    EPWMxB in high together with S3=1.

    Now the question becomes

    why the pulse is 880ns? It should only take cycles that the code execute, and it should be lower than 880ns(about 53 SYSCLK) I guess since the two code execution cycle should not be so long.

  • 0 in reply to Howard Zou
    TI__Mastermind 42195 points

    Howard,

    This should be able to be solved by using the trip zone submodule to force the output during your initialization cycle.

    As for "why is the pulse 880ns?": does the 880 ns number change with different FED settings? That may explain part of the delay.


    Regards,
    Cody   

  • 0 in reply to Cody Watkins
    TI__Genius 12365 points

    Cody,

    no, it does not change with different FED setting.

  • 0 in reply to Howard Zou
    TI__Mastermind 42195 points

    Howard,

    this can be avoided altogether by forcing the output for the first cycle using the trip zone, this is my recommendation.

    If you still want to investigate why the pulse is 880ns wide I can look more into this on Monday, please let me know. Additionally if you do want me to look into this further please attach any example code that you may have to demonstrate the issue.

    Regards,
    Cody