TMS320F28P650DK: Errata about prefetching beyond Valid Memory

Part Number: TMS320F28P650DK

Tool/software:

Hi Champ,

I am reconfirming for my customer.

It is noted that it leaves 8W length (0x25FF8-0x25FFF) in the end of LS9, those memory can't be used by CPU1.

If user configures LS8 & LS9 as CLA program in .cmd file as below,

RAMLS_CLA_PROG : origin = 0x004000, length = 0x004000 // LS8~LS9 for CLA_PROGRAM

(1). Would the errata also affect the CLA core for using the last 8W length of LS9 as CLA program ? Should be NOT, right ?

(2). https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1405856/tms320f28p650dk-the-ls8-and-ls9-ram-for-cla-program/5391776#5391776

In this post, may I reconfirm the conclusion is that user can't assign LS0, LS1, LS8 and LS9 RAM as CLA program memory as a combined memory sector shown as below, right ?

RAMLS_CLA_PROG : origin = 0x004000, length = 0x005000 // LS8~LS9~LS0~LS1 for CLA_PROGRAM

(3). Following #2, if LS8 & LS9 & LS0 & LS1 could be assigned as CLA program, in this scenario, should 8W length on LS9 be reserved to avoid this errata ? 

Thanks and regards,

Johnny

  • Hi,

    (1). Would the errata also affect the CLA core for using the last 8W length of LS9 as CLA program ? Should be NOT, right ?

    No, it's only for CPU.

    (2). https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1405856/tms320f28p650dk-the-ls8-and-ls9-ram-for-cla-program/5391776#5391776

    In this post, may I reconfirm the conclusion is that user can't assign LS0, LS1, LS8 and LS9 RAM as CLA program memory as a combined memory sector shown as below, right ?

    RAMLS_CLA_PROG : origin = 0x004000, length = 0x005000 // LS8~LS9~LS0~LS1 for CLA_PROGRAM

    That is correct.

    Regards,

    Vivek Singh

  • Hi Vivek,

    Thanks for your reply.

    No, it's only for CPU.

    To configure LS8 & LS9 as CLA program, user has to copy code from flash that it's done by CPU1 as below,

    memcpy((uint32_t *)((uint32_t)&Cla1ProgRunStart + (0x1E000U)), (uint32_t *)&Cla1ProgLoadStart,
    (uint32_t)&Cla1ProgLoadSize);

    Executing the memcpy line, won't it be a problem here for the errata ? since CPU1 should still own the last 8W length of LS9 at this moment, or my concern is unnecessary actually ?

    That is correct.

    So that how would you suggest to configure a memory for LS0_1, and a memory for LS8_9 RAM as CLA program memory in .cmd file and memcpy ?

    Should it configure as such ?

    .cmd file

    RAMLS8_LS9 : origin = 0x004000, length = 0x004000 // LS8~LS9 for CLA_PROGRAM

    RAMLS0_LS1 : origin = 0x008000, length = 0x001000 // LS0~LS1 for CLA_PROGRAM

    Cla1Prog : LOAD = FLASH_BANK0,
    RUN = RAMLS8_LS9 | RAMLS0_LS1,
    LOAD_START(Cla1ProgLoadStart),
    RUN_START(Cla1ProgRunStart),
    LOAD_SIZE(Cla1ProgLoadSize),
    ALIGN(4)

    .c file to do memcpy

    memcpy((uint32_t *)((uint32_t)&Cla1ProgRunStart + (0x1E000U)), (uint32_t *)&Cla1ProgLoadStart,
    (uint32_t)&Cla1ProgLoadSize);

    Do you see any problem here ? Please correct if there is any wrong.

    Thanks,

    Johnny

  • Hi Vivek,

    Any chance to get the input here ?

    Thanks,

    Johnny

  • Executing the memcpy line, won't it be a problem here for the errata ? since CPU1 should still own the last 8W length of LS9 at this moment, or my concern is unnecessary actually ?

    Issue is for the code fetch and not for reading the data so it should be ok.

    .c file to do memcpy

    memcpy((uint32_t *)((uint32_t)&Cla1ProgRunStart + (0x1E000U)), (uint32_t *)&Cla1ProgLoadStart,
    (uint32_t)&Cla1ProgLoadSize);

    On CPU side, address for LS8/LS9 and LS0/LS1 are not continuous so this memcpy will not work for LS0/LS1. You need to do it in two step. One for LS0 and LS1 and other one for LS8 and LS9.

    Regards,

    Vivek Singh

  • Hi Vivek,

    Thanks for the reply.

    Issue is for the code fetch and not for reading the data so it should be ok.

    Would you kindly clarify more what is the difference between code fetch and reading data ?

    You need to do it in two step. One for LS0 and LS1 and other one for LS8 and LS9.

    Do you mean doing as such ? Do twice for that

    .cmd file

    RAMLS8_LS9 : origin = 0x004000, length = 0x004000 // LS8~LS9 for CLA_PROGRAM

    RAMLS0_LS1 : origin = 0x008000, length = 0x001000 // LS0~LS1 for CLA_PROGRAM

    Cla1Prog : LOAD = FLASH_BANK0,
    RUN = RAMLS8_LS9,
    LOAD_START(Cla1ProgLoadStart_LS8_9),
    RUN_START(Cla1ProgRunStart_LS8_9),
    LOAD_SIZE(Cla1ProgLoadSize_LS8_9),
    ALIGN(4)

    Cla1Prog : LOAD = FLASH_BANK0,
    RUN = RAMLS0_LS1,
    LOAD_START(Cla1ProgLoadStart_LS0_1),
    RUN_START(Cla1ProgRunStart_LS0_1),
    LOAD_SIZE(Cla1ProgLoadSize_LS0_1),
    ALIGN(4)

    .c file to do memcpy

    memcpy((uint32_t *)&Cla1ProgRunStart_LS0_1, (uint32_t *)&Cla1ProgLoadStart_LS0_1,
    (uint32_t)&Cla1ProgLoadSize_LS0_1);

    memcpy((uint32_t *)((uint32_t)&Cla1ProgRunStart_LS8_9 + (0x1E000U)), (uint32_t *)&Cla1ProgLoadStart_LS8_9,
    (uint32_t)&Cla1ProgLoadSize_LS8_9);

    Is above looking correct ? Please correct me if there is any wrong.

    Thanks and regards,

    Johnny

  • Hi Johnny,

    Would you kindly clarify more what is the difference between code fetch and reading data ?

    C28 CPU has different interface for fetching the code (instructions to execute) and reading the data.

    Is above looking correct ? Please correct me if there is any wrong.

    This looks good to me. 

    Regards,

    Vivek Singh