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SPI fo 28335 master mode

Hi every one, 

I want to use the SPI module of the F28335 in master mode. I want to use it with 3 wires conection and i hace some questions:

1- Can i use the line SPISIMO to star a conversion from an output ADC? The externar ADC begins a conversion when i send a high level signal, so i thougth that i can send a high level followed by low level signal to star a conversion.

2-Is it necesary use the SPISTEAn wire for the comunication? I only use the DSP and an external ADC for the SPI comunication.

3-In the future i will use it with optic fiber to send and receive information for noise problems. Have i get another technical documentation for it to work properly? 

Regards,

Gorka

  • Hi Gorka,

    1) I suppose you could use it this way alternating between sending 0's and 1's, but it seems like a GPIO would be a simpler solution.  Note that if you do go this route, the SPI will TX line will hold whatever value was last transmitted on the line until the next transmission.  So if your transmission ends in '0' the line will stay low, and if it ends in '1' it will stay high.  I imagine if you configured the baud rate correctly you could mimic the pulse you need for your external ADC.  I have not seen it used for this though.

    2) This signal is only for use when you are communicating with another SPI and wanting to receive data from it.  It "enables" it to transmit.

    3)  Here is the link to the user's guide for your device.  This should have all the information you need.  http://www.ti.com/lit/ug/sprueu3a/sprueu3a.pdf 

    Please feel free to let me know if you have any other questions.

    Kris

  • Thanks for your reply Kris,

    I have made some simulations witn the SPI proving differets convinations of the registers. I have noticed that if i don't set the TALK register, i can use as well the module without sending data.

    Now i use de SPISTEAn line for start a conversion in the remote ADC. The only thing i have to do is write in SPITXBUF some dummy data for the clock signal.

    For those who don´t know how to use the SPI, is easy make a 3 wire conection for only one remote ADC, the SPISTEAn line is controlled by the DSP when you want to send/receive data. So this line is connected (in my case) to the CS (conversion start) line of the ADC. The line SPISTEAn goes up again when the transmision is completed.

    Regards,

    Gorka

  • Sounds like an easy solution for your system!  I haven't heard of the STE line being used for short pulses, but it most certainly will work.

    Kris

  • Thanks Kris for your reply

    I have the SPI module working. But I have one question. I send dummy data to start the pulses of the clock. The time between i write in SPIDAT and when the pulses star is variable so I have problems to synchronizate. Is somewhere an specific time from write in SPIDAT and the star of the clock pulses? I have read the SPI document and anywhere specify this time.

    Regards,

    Gorka

  • Hi Gorka,

    How exactly are you measuring the time between the SPITXBUF write and the time the signal appears on the pin?  Note you should not write directly to SPIDAT, although I don't think this is the cause here.  

    Kris

  • Hi Kris,


    Thank you very much for your response, I am co-worker with Goka. Our problem is as follows:


    We use an interrupt associated with Timer 1 to generate on GPIO pin a toggle (around 120ns) that enables the start of the conversion external ADC, then write to the registry SPITXBU dummy value remaining transmission 
    disabled in master mode, this starts the clock pulses to receive data, the problem is that while the toggle is perfectly stable on the oscilloscope the clock pulses are not synchronous with toggle, ie clock have a delay of 200ns at times of more and others less, this will cause synchronization problems and we forced to operate below 200KSPS because a higher sampling rate readings are wrong.
    How we make the start of the clock pulse are synchronous with the toggle, ie always start clock pulses with the same delay (100ns) respect a togglel.
    So far we have not found the for a perfectly synchronize the start of the clock pulses and each time starting with a different gap.

    The CLK is configured at 6,2Mhz and 16 bits reception. Total time 2,5us Max sampling rate ADC 400KSPS but only workat 200KSPS due problems with synchronous CLK start.

    It may have something to do the above in this post:

    http://e2e.ti.com/support/microcontrollers/tms320c2000_32-bit_real-time_mcus/f/171/t/160379.aspx

    In this post talks about GPIO input qualification may be incorrectly configured. You think this may be the problem?
    Juanjo.