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High Speed SPI mode on F2837xS

Hi,

I am trying to use the high speed mode for the SPI in F28377S Launchpad XL ver:1.0. I compared the maximum SPI clock speeds that can be achieved in normal GPIO pins with HS_MODE=0 and high speed GPIO pins with HS_MODE=0/1. I monitored the SPICLK waveform on 200MHz Oscilloscope with the suitable probe. I do not see any difference if waveform between the normal mode and high speed mode on both normal and high speed pins.  Please refer to the waveforms for the following cases (CLKPOLARITY and CLK_PHASE is 0 for all)-

Case 1) 40 MHz HS_MODE=0, pin 18 SPI A - 40mHs0pin18.jpg

Case 2) 40 MHz HS_MODE=0, pin 60 SPI A - 40mHs0pin60.jpg

Case 3) 40 MHz HS_MODE=1, pin 60 SPI A - 40mHs1pin60.jpg

In one of the discussion https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/403001 , it is mentioned that for non high speed GPIO the speed limit is 25MHz and high speed pins can approach speeds up to 40MHz is enabled for SPI. In another discussion https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/355840 , it is mentioned that "The maximum toggling frequency of the GPIOs on F2837xD is 50MHz". But in this case I do not see any difference in SPICLK between non high speed mode and high speed mode GPIO pins for SPI.

Is there any limitation of the HS GPIO pins that are provided on the Launchpad that causes the distortion of high speed clock even with HS_MODE = 1? Is there any specific settings to be done for GPIO pins for HS_MODE=1?

Is this the expected behavior for both normal mode and high speed mode? Is so then why do we have a separate setting to enable high speed mode HS_MODE in the SPI registers?

Is there any drawback if we enable HS_MODE and work on normal mode SPI or disable HS_MODE and work on High speed SPI as I do not see the difference between them?

  • Hello,

    When using the high speed mode of the SPI, there will be no visible difference in the waveforms. The delay from SPICLK to the receive latch point is the longest path in a SPI transaction. This longest path is what determines the maximum speed at which the SPI can operate in full duplex mode. The HS_MODE of SPI enables some internal circuitry which compensates for this longest path allowing the SPI to transact data at faster clock rates.

    Basically, you will not see a visible difference in the SPI transaction between High Speed Mode and normal mode. You can use any GPIO in normal SPI mode, but will not get the internal High Speed mode enhancements if you do not use the High Speed Mode-enabled GPIOs.

    -Mark
  • Hello,

    Thanks for the response. I need few more clarifications.

    1) If we enable the HS_MODE=1 by default, will there be any issues in using normal mode speed in the normal pins or high speed pins when the high speed mode circuit enhancements are enabled?

    2) Even if we enable the HS_MODE=1 in the controller, the speed we can achieve is limited by the device connected and whether the device has the circuitry to support the high speed mode over the connection path right? Is there any place where the longest path achievable limit is diocumented for the high speed mode?

    -Aditya
  • Sorry for the delays Aditya,

    1) There are no problems supporting the standard speeds on high speed pins if HS_MODE = 1. Please be sure to check the Master mode input timings as they are slightly different.

    2) The only hardware requirements that we have documented is the maximum load capacitance of 5 pF. See the note in section 5.10.5.1 SPI Electrical Data and Timing in the Device Datasheet. SPRS881. If the Hardware requirements are met and the traces and signals are clean, then the SPI should be able to achieve the maximum possible Speed of 50MHz. (200MHz/4)

    I hope I have answered your questions.

    Mark