TMS320F28377D: Can I debug CPU1 from RAM while CPU2 runs from FLASH without connection to it?

Hi,

1. If I connect to CPU1 with my debugger (xds220 iso) and run its code CPU2 doesn’t work (but I don’t connect to CPU2). The function “IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH)” doesn’t help to brings CPU2 out of reset. Can I debug CPU1 from RAM while CPU2 runs from FLASH without connection to it?

Yes, you should be able to RUN the CPU1 from RAM and CPU2 from Flash. Does CPU1 code runs correctly in this case?

2. What does the function “IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM)” do and how I can use it? If I connect to CPU2 and load program to its RAM I can run it manually so I don’t find scenario for function “IPCBootCPU2” with parameter “C1C2_BROM_BOOTMODE_BOOT_FROM_RAM”.

It let CPU2 boot from RAM where code has been already loaded. Incase user has loaded the code in RAM and does not want to load the code again after CPU2 reset then they can use this.

Regards,

Vivek Singh

Hi,

I programmed CPU2 flash and disconnected it. Then I connected to CPU1, loaded program to its RAM and run, but CPU2 code didn't work. What have I done wrong?

Before disconnecting the CPU2 can you reset the CPU2 and then disconnect? Basically load the code on CPU2, reset it and then disconnect it.

Vivek Singh

Vivek Singh said:

Basically load the code on CPU2, reset it and then disconnect it.

If I do this sequence, I will get (IpcRegs.IPCBOOTSTS == 0) and endless loop

while ((bootStatus != C2_BOOTROM_BOOTSTS_SYSTEM_READY));

in function "IPCBootCPU2".

If I only connect to CPU1 and run program from RAM function "IPCBootCPU2" will end without errors or problems I can detect but CPU2 will not work (CPU2 code was programmed into Flash before I powered up the board).

ok, so CPU1 get stuck but does CPU2 works fine in this case ? Also for CPU1 how are you running the code? Are you initializing the location 0xD00 for RAM boot and then after code load doing "reset" and then "run"?
Generally one should run both CPU in standalone mode or in debug mode because CPU2 should not run before CPU1. In this case when CPU1 is in reset CPU2 start running hence getting bit tricky.

Vivek Singh

Vivek Singh said:

ok, so CPU1 get stuck but does CPU2 works fine in this case ? Also for CPU1 how are you running the code? Are you initializing the location 0xD00 for RAM boot and then after code load doing "reset" and then "run"?
Generally one should run both CPU in standalone mode or in debug mode because CPU2 should not run before CPU1. In this case when CPU1 is in reset CPU2 start running hence getting bit tricky.

I tried many things and CPU2 didn't work in any case on debug session if CPU1 attempted to start it to work from Flash.

Example what I do (in steps):

CPU2 doesn't work.

If I connect to it I see:

I tried to change EMU_KEY and EMU_BMODE, reset and run CPUs, connect/disconnect them in different combinations but CPU2 didn't want to work from Flash. Maybe I am missing some important thing or thinking wrong...

... and another question:

There is a table of Reset Signals in datasheet:

I understand it as follows: I don't need to use "IPCBootCPU2" procedure again after CPU2 WD Reset, but without this operation CPU2 doesn't work. I need to enable NMI interrupt and there kickoff CPU2 to start by "IPCBootCPU2" procedure, right? So, what does it mean that CPU2 isn't held in Reset after CPU2.WDRS?

Thanks