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Hello!
I want to use the F2837xD LaunchPad to create four synchronized 100kHz, 50% duty cycle PWMs, each phased shifted with respect to the others. Each phase shifted signal should lag with respect to the reference PWM (Signal 1 of 5).
The scheme I'm using is the following:
I use ePWM1 to create the first PWM signal, which is also used as master for all other PWMs.
For the other PWMs, I use ePWM2 and ePWM4 to 6 as slaves. They load their respective phases value when the Master generates a SYNCOUT (in the event of master counter == 0).
I managed to get the ePWMs running using only the regular ePWM. If I want to use the HRPWM, I suddenly get big errors in the phase shift. For clarification, find below my register values and the measured phase shifts. Do you see an error with this or is there an altogether easier solution for realizing a lagging phase shift?
phase lag in clock cycles | calculated phase value in clock cycles | TBPHS | TBPHSHR | Δt target | Δt actual | |
ePWM1 | 0 | 0 | 0x0000 | 0x0000 | reference PWM | reference PWM |
ePWM2 | 4.00 | 998.00 | 0x03E6 | 0x0000 | 40.00ns | 39.7ns |
ePWM4 | 4.25 | 997.75 | 0x03E5 | 0xC000 | 40.25ns | 57.3ns |
ePWM5 | 4.50 | 997.50 | 0x03E5 | 0x8000 | 40.50ns | 54.3ns |
ePWM6 | 4.75 | 997.25 | 0x03E5 | 0x4000 | 40.75ns | 51.8ns |
note: In this case, one PWM period has 1000 clock cycles, 1 clock cycle equals 10ns. The phase value is "split" between TBPHS and TBPHSHR with the HR-Register containing the fractional part. | ||
The phase values are calculated as follows: | ||
PHS = (RELOAD+2 -PHASE) % RELOAD | ||
whereby: | ||
RELOAD = T - 1 = counter reload value used by ePWM | ||
T = PWM period in clock cycles | ||
PHASE = lagging phase shift expressed in clock cycles (can have fractional part) | ||
PHS = absolute phase shift in clock cycles (the value that has to be assigned to TBPHS and TBPHSHR) | ||
2 = correction of master-to-slave time lag (in this case 2 clock cycles) | ||
% RELOAD ensures that no invalid values (bigger than RELOAD) can be applied. |
Sincerely
Matthias
Student (University of Applied Sciences Ingolstadt)
Hi Devin,
Yes, I am using the AUTOCONV bit.
Also, my code updates the MEP scale factor periodically. For this I use the SFO() function from the library. The library included in the makefile is C:/ti/controlSUITE/device_support/F2837xD/v190/F2837xD_common/lib/SFO_v8_fpu_lib_build_c28.lib
I'm not using the scale factor directly, though. According to page 1849 in the TRM, in case of autoconversion usage, only the hardware uses the Scale Factor. The code that is periodically called to calculate a new TBPHSHR value looks like this (It doesn't use the scale factor):
//variable that holds the phase shift in clock cycles, e.g. 4.25 clock cycles = 42.5ns
172 real_T TBPHSf = Converter_DHB2_PWM_LaunchPad_B.Switch2;
173 TBPHSf -= EPwm2Regs.TBPHS.bit.TBPHS;
174 TBPHSf *=65536;
175 EPwm2Regs.TBPHS.bit.TBPHSHR = (uint16_T)TBPHSf;
PS: The code isn't entirely written by me. I use automatic code generation of the C2000 block set of Simulink. Which is a bit of a hassle at times.