• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 82 subscribers
  • Views 932 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377S: use of DMA connection of the SPI hardware

user4221161
Expert 1050 points
Part Number: TMS320F28377S

Hello folks,

i have a question to the TMS320F28377S and it´s SPI´s DMA connection. In the technical reference guide is written, that the SPI hardware does not have a nativ CHIP SELECT hardware,
instead user has to program a GPIO pin per slave to do the job.


Configuring a GPIO to emulate SPISTE
In many systems, a SPI master may be connected to multiple SPI slaves using multiple instances of
SPISTE. Though this SPI module does not natively support multiple SPISTE signals, it is possible to
emulate this behavior in software using GPIOs. In this configuration, the SPI must be configured as the
master. Rather than using the GPIO Mux to select SPISTE, the application would configure pins to be
GPIO outputs, one GPIO per SPI slave. Before transmitting any data, the application would drive the
desired GPIO to the active state. Immediately after the transmission has been completed, the GPIO chip
select would be driven to the inactive state. This process can be repeated for many slaves which share
the SPICLK, SPISIMO, and SPISOMI lines.

So far so good.
The thing which makes me wondering is, that the SPI has a 16 stage buffer, plus a DMA connection (especially the DMA makes me wondering, because the other HW´s don´t have it).
For example a lot of SPI slaves need a rising edge after each dataword. But if i place all the data in the SPI´s buffer oder DMA, the slave get´s bursted with datas without a sync´ed CHIP SELECT,
and will dispose the datas. Basically i think of a DMA like "configure and forget".
So, i do not really understand the sense of the DMA connection of the SPI, if most slaves wont be able to take advantage from it because of the needed CHIP_SELECT pin.

In my specific case i have a slave which needs 24 Bits per dataword and a rising edge after each word. Currently i split the 24 Bit in 2*12 Bit and put them to the SPI shift register.
So currently i have to

- set CHIP_SELECT active,
- send first 12 Bit,
- get interrupt when 12 bits are shifted out and send the second 12 Bit
- get interrupt when 2nd 12 bits are out and set CHIP_SELECT inactive

best regards,
Jasson

  • 0
    TI__Genius 15260 points
    Hi Jasson,

    First I want to note that the SPI does have a hardware STE pin. The section you copied regarding emulation the SPISTE pin is for if you want to communicate with multiple slaves with our device as the master.

    The benefits of the DMA certainly depend on the device you are communicating with as you pointed out. DMA is more commonly used for received data than transmitting, but it can definitely be used for both.

    In your case, I think you should be able to use our hardware SPISTE signal and not worry about manually setting it. Here's how I'm thinking it should work best:

    (a) Write your two 12-bit words to the SPI FIFO (or you could use the DMA as well)
    (b) In FIFO mode, the SPISTE signal should remain active throughout the whole transmission, and not go high until after both words are transmitted

    Regards,
    Kris
  • 0 in reply to Kris Parrent
    Expert 1050 points
    ...yes, i was to too inacurate - on the board are two devices connected to SPI.

    Thanks for reply, so i can classify better better my thoughts!