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Hi Team,
My Customer used TMS320F2837s in solar inverter application, and while at night, the power supply of 3.3V(VDDIO/VDD3VFL/VDDA) would be 1V(low than startup), and power supply of 1.2V is 0v, the external monitor device output 0V to XRS pin; but according to the datasheet, which required “The supplies should ramp to full rail within 10ms”. Also while in day time, the 3.3V power supply will be start up from 1V.
Will it affect to the reliability of TMS320F28374s or not at upper situation?
update the waveform as attached file. expect for your reply, thanks.
Best Regards
Hi Devin,
Clarify the issue with customer, and understand that the cause of power supply issue: while in night, the Solar inverter still connect to the PV panel and the AC grid, and both of the PV panel and AC grid still exist, so the F28374s ADC input still got the voltage from the sampling circuit, which will affect the VDDIO&VDDA via the diode.
So the power supply can't be pull down to 0v while the solar inverter implemented in night. Customer is very concern for the remaining voltage in power supply, could you kindly help on below items customer concerns:
if the power supply still get some remaining voltage (not zero, typical 400mV);
Customer want to understand that which risk will be implement to F28374s?
And how the power supply remaining voltage to affect the F28374s?
What’s the minimum remaining voltage for the power supply? 0.3v or less? Is there any documents descript the power supply remaining voltage?
TMS320F28374s ADC Remaining voltage issue.docx
Best Regards
Benjamin