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TMS320F280049: Vector Address Validity Check

Jack Tan80
Mastermind 7100 points
Part Number: TMS320F280049

Dear F28004x expert,

In F28004x TRM, there is a section mentioned about 'Vector Address Validity Check'. There is a redundant vector table located at address 0x01000D00-0x01000EFF, but I couldn't find this address range in C28x memory map, can you please explain it?

  • 0
    TI__Guru 53025 points
    Hi Jack,

    Yes, the memory map doesn't show it but it is located at 0x01000D00-0x01000EFF. Like the TRM says, it gets written to when the primary vector table is written to. Typically you wouldn't need to write to it directly unless you were trying to force an error. The PIEVERRADDR register that the second paragraph is referring to can be found in the CPU_SYS_REGS registers. There's also an NMI flag for the error.

    Was there some specific information you were looking for?

    Whitney
  • 0 in reply to Whitney Dewey
    Mastermind 7100 points
    Whitney,

    Thanks.

    Yes, I see what TRM says. If the redundant vector table get written while the primary vector table is written to, what is the purpose of designing this vector table?
  • 0 in reply to Jack Tan80
    TI__Guru 53025 points

    It's to detect issues like flipped or stuck bits (hardware faults)--not incorrect or unintentional writes by the software.

    Whitney

  • 0 in reply to Whitney Dewey
    Mastermind 7100 points
    Thanks, whitney