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Original question:

TMS320F28035: Question about CPU and CLA try to access 'cla_to_cpu message RAM' at the same time issue

TMS320F28035: Question about CPU and CLA try to access 'cla_to_cpu message RAM' at the same time issue

James Will
Prodigy 60 points

Part Number: TMS320F28035

Hi Vivek,

Thanks for your reply. It really helped, but I have a further related question:

Let's say I have an unsigned 32-bit integer variable in CLA_to_CPU message RAM, called 'result_value'. Currently, CPU is accessing this variable and performing the following operation:

uint32 local_variable;

local_variable = ( result_value >> 8);

The shifting will take a few cycles and what will happen to 'result_value' if CLA tries to write to this variable during the shifting process? Would this cause some thread safe issue?

Thanks.

  • 0
    TI__Guru** 117431 points

    James,

    Both can not write to same variable. If it is placed in CLA_to_CPU message RAM then only CAL will have write access. CPU will only have READ access to it.

    Vivek Singh

  • 0 in reply to Vivek Singh
    Prodigy 60 points
    Hi Vivek,
    Thanks for you reply, but I don't think both the CPU and the CLA try to write to the same variable in this case. The CPU is only reading from the variable. My understanding is that the variable 'result_value' is not modified by just performing the following operation:

    local_variable = ( result_value >> 8);

    But I could be wrong.

    Maybe it was not a very good example for demonstrating my concern.

    My real concern was the CPU needs to read from this variable two times during one interrupt routine, one time is in the beginning of the interrupt and one time is near the end of the interrupt, but in between of the two times of reading, the CLA modified this variable, and this may cause thread safety issue.
  • 0 in reply to James Will
    TI__Guru** 117431 points

    James,

    Sorry, I misunderstood it. You are right, it'll just read the variable in do the shifting but will not write back.

    I am still not clear on the issue here. CLA modifying the variable between two reads is expected event or non-expected event?

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Prodigy 60 points
    Vivek,
    Basically I was just saying the user had to make sure the timing in their application when access the same memory location from two cores running concurrently, so this non-expected event won't happen. This is all.

    Thanks.