CCS/TMS320F28379D: Synchronizing Manual Control (GPIO) of the SPISTE Signal?

    std::vector<SpiWord>::const_iterator it;

    GPIO_WritePin(61, 0);

    for (it = sMultiData.begin(); it != sMultiData.end(); it++)
    {
        // send the data
        SpiaRegs.SPITXBUF = *it;
    }

    // This will exit before the data has completely shifted out of SPIDAT
    while (SpiaRegs.SPIFFTX.bit.TXFFINT == 0) {}

    GPIO_WritePin(61, 1);

Manoj,

It looks like the TXFFINT flag only indicates when there are 0, 1, 2, or 16 words left in the transmit fifo buffer.  Not when the actual data has been shifted out of SPIDAT.  

When using the TXFFINT flag the GPIO controlled SPISTE ends up turning off 1 spi word too soon, when TXFFIL is set to 0x0.

Upon further testing it looks like the following:

1) In FIFO mode the interrupt flag (TXFFINT) seems to indicate when the transmit FIFO is empty (TX_FIFO_n).  The BUFFULL_FLAG indicates when SPITXBUF is empty and has transferred its contents to SPIDAT.  Not when SPIDAT is done shifting out the data. 

An interrupt flag signaling SPIDAT has completed is required to manually control the SPISTE via GPIO in FIFO mode.  Otherwise the GPIO controlled SPISTE will be unset early and the data transfer will be incomplete.

2) In non-FIFO mode the INT_FLAG appears to indicate (via oscilloscope) when the SPITXBUF is empty.  Not when SPIDAT is done shifting out the data.  When waiting for a transmit to complete with:

SpiaRegs.SPITXBUF = data;

while (SpiaRegs.SPISTS.bit.INT_FLAG == 0x0) {}

// disable SPISTE manually, this will be too early
GPIO_WritePin(61, 1)

Is there a way to know when SPIDAT is done shifting out the data to a slave?  Or some other method to synchronize a GPIO controlled SPISTE signal?

Kindly,

Graham