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TMS320F28377D: CMPA updating in CLA

Part Number: TMS320F28377D

Hi,

 

if the customer update CMPA in CLA (triggered by sinc), and the PWM count down; can CLA ensure the updating will be done in the present cycle but not next cycle?

 

Thank you!

  • Hello,
    Concerned experts have been notified of this query.
    Note that TI US office is closed today so please expect a delayed response.


    Regards
    Himanshu
  • Hello, Yan

    This is system dependent.  There is nothing in the MCU to insure the update will be within the current cycle.  It will depend on

    • When/how the SDFM is triggered
    • If the CLA is already busy or if it is idle
    • How long the CLA computation is before the update to CMPA is made 

    The SDFM can be synchronized to PWM11 or 12 as shown in the SDFM block diagram in the device-specific technical reference manual (TRM).   This feature can be used in the design to synchronize the SDFM to a PWM cycle.  

    I hope this helps.  If my response resolved your question, please click the "verified answer" button.

    thank you

    Lori

  • Yan,

    I wanted to add more information. The best, and safest way, to update CMPA at a specific time is to use the shadow register feature. This is documented in the description of the CMPA and the CMPCTL register descriptions in the device specific TRM.

    I hope this helps. If my response resolved your question, please click the "verified answer" button.

    Regards
    Lori
  • Dear Lori Heustess:
    This question(about "CLA and PWM CPMA") was raised by me.
    In my program, I have used the "shadow mode" and enabled the "shadow register" as below:
    (*ePWM[n]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    shadow→active will be done on the event for example CTR = PRD event.
    That's no problem!

    My question is:
    When I use the shadow register, as you know, the true active register will not be updated immediately.
    Is there a "deadline" that I must update the CMPA ahead of the event:shadow→active?(for example the CTR = PRD event)
    If I missed some "deadline", and updated the CMPA after the "deadline", then the true active one
    have to update untill next event.

    If there is a deadline, so I want to know how long it must take to in advance?

    My program like below:
    __attribute__((interrupt)) void Cla1Task1 ( void ) //triggered by SINC
    {
    .....; //code here
    Delay(x); //delay x us
    //I read the curTime from Debug and adjust the "x" ensure the "PWM7on→bit.CMPA" as late as possible.
    CurTime = EPwm7Regs.TBCTR;
    //If below executed just 1 system clk before CTR = PRD event , can we ensure value updated on current event?
    EPwm7Regs.CMPA.bit.CMPA =PWM7on;
    }

    Thank you very much!
  • Dear Lori Heustess:
    This question(about "CLA and PWM CPMA") was raised by me.
    In my program, I have used the "shadow mode" and enabled the "shadow register" as below:
    (*ePWM[n]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    shadow→active will be done on the event for example CTR = PRD event.
    That's no problem!

    My question is:
    When I use the shadow register, as you know, the true active register will not be updated immediately.
    Is there a "deadline" that I must update the CMPA ahead of the event:shadow→active?(for example the CTR = PRD event)
    If I missed some "deadline", and updated the CMPA after the "deadline", then the true active one
    have to update untill next event, so delay a cycle.

    If there is a deadline, so I want to know how long will it take to in advance?

    My program like below:
    __attribute__((interrupt)) void Cla1Task1 ( void ) //triggered by SINC
    {
    .....; //code here
    Delay(x); //delay x us

    //I read the curTime from Debug and adjust the "x" to ensure the "PWM7on→bit.CMPA" as late as possible.
    CurTime = EPwm7Regs.TBCTR;
    //If this code executed just 1 sys_clk before CTR = PRD event , can we ensure the value updated on current event?
    EPwm7Regs.CMPA.bit.CMPA =PWM7on;
    }

    Thank you very much!
  • The new value to CMPA should be written at least 1 sys-clock cycle before of the shadow->active event. As long as the new value is written on or before that cycle, the new value will load into the active register on the event.
  • Hello,

    I haven’t heard from you for a few days, so I’m assuming you were able to resolve your issue.

    If this is the case, please press the "verified answer" button to close the thread. 

    If this isn’t the case, please click the "This did NOT resolve my issue" button and reply to this thread with more information. If this thread locks, please click the "Ask a related question" button and in the new thread describe the current status of your issue and any additional details you may have to assist us in helping to solve your issues.

    Regards,
    Lori