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Hi Team,
How can the SPI of DSP28335 be implemented in flash communication, and the chip selection is continuously selected?
In flash communication, after sending an instruction, the customer needs to send the address and data. But SPI always raises the cs bit after sending an 8-bit control command. In this case, the address and data cannot be sent any more.
Currently, he uses a normal GPIO as a chipset. Customer would like to know is there another good way to resolve this problem?
Thanks.
Annie,
SPISTEn signal should stay active low between back-to-back transfers in master mode. See datasheet sprs439n, Figure 5-17, p.63, footnote A.
So, you need to not allow a gap between transfer bytes. FIFO mode can help here where you could load up the command byte, and the address and data bytes into the FIFO and they will go out back-to-back. If you don't use FIFO mode, you still have a double-buffer mechanism and could keep the SPI loaded using that mechanism.
Regards,
David
