TMS320F28335: DSP28335 SPI flash communication, and how to continue to select for CS#

Annie Liu

Hi Team,

How can the SPI of DSP28335 be implemented in flash communication, and the chip selection is continuously selected?

In flash communication, after sending an instruction, the customer needs to send the address and data. But SPI always raises the cs bit after sending an 8-bit control command. In this case, the address and data cannot be sent any more.

Currently, he uses a normal GPIO as a chipset. Customer would like to know is there another good way to resolve this problem?

Thanks.

over 7 years ago

0 David M. Alter over 7 years ago

TI__Guru 61235 points

Annie,

SPISTEn signal should stay active low between back-to-back transfers in master mode. See datasheet sprs439n, Figure 5-17, p.63, footnote A.

So, you need to not allow a gap between transfer bytes. FIFO mode can help here where you could load up the command byte, and the address and data bytes into the FIFO and they will go out back-to-back. If you don't use FIFO mode, you still have a double-buffer mechanism and could keep the SPI loaded using that mechanism.

Regards,

David

0 Annie Liu over 7 years ago in reply to David M. Alter

TI__Genius 10295 points

Hi David,

Thanks for your answer. Customer would like to know how to set the double buffering mechanism?

Thanks.

Annie

0 David M. Alter over 7 years ago in reply to Annie Liu

TI__Guru 61235 points

Annie,

The double-buffer mechanism on TX is always in place and active. See the SPI User's Guide SPRUEU3A.

Regards,

David

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TMS320F28335: DSP28335 SPI flash communication, and how to continue to select for CS#