CCS/TMS320F28335: DSP28335

Tool/software: Code Composer Studio

hello i am trying to communicate my dsp 28335 with DAC mcp 4726 . i am trying to send some hex value  from my master 28335 to my slave mcp4726. My code doesnt show any errors but i am unable to see any data neither on the master side nor on the slave side .below is my code kindly help me what is the problem in the code.

#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#include "DSP2833_I2C_defines.h"

void I2CA_Init(void);
void I2CA_Write();
void I2CA_Wait(void);

interrupt void i2c_int1a_isr(void);

struct FLAGREG_BITS
{
volatile unsigned int Rsvd:16; //bits 0-14
};
union FLAG_REG
{
volatile unsigned int all;
struct FLAGREG_BITS bit;
}Flags;

void main (void)

{
InitSysCtrl();

InitI2CGpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.I2CINT1A = &i2c_int1a_isr;
EDIS; // This is needed to disable write to EALLOW protected registers

I2cIndex = 0;

// Step 4. Initialize all the Device Peripherals:
I2CA_Init();

I2CA_Write();

PieCtrlRegs.PIEIER8.bit.INTx1 = 1;

// Enable CPU INT8 which is connected to PIE group 8
IER |= M_INT8;
EINT;

}
void I2CA_Init(void)

{

I2caRegs.I2CSAR = 0x0060; //Slave Address,In my case it is 60

I2caRegs.I2CPSC.all = 14;

I2caRegs.I2CCLKL = 5;

I2caRegs.I2CCLKH = 5;

I2caRegs.I2CIER.all = 0x24;

I2caRegs.I2CMDR.all = 0x0020;

I2caRegs.I2CFFTX.all = 0x4001;

I2caRegs.I2CFFTX.all = 0x2041;

}

//My Write function .

void I2CA_Write ()

{

I2caRegs.I2CSAR = 0x60;

while(I2caRegs.I2CSTR.bit.BB ! = 0) ; //Waiting for BB is set to Zero.

I2caRegs.I2CCNT = 2 ; //Below 2bytes i want to transmit to EEPROM

I2caRegs.I2CDXR = 0x01 ; // First Byte

I2caRegs.I2CDXR = 0x02 ; //Second Byte

//I2caRegs.I2CDXR = 0x02 ; Third Byte

I2caRegs.I2CMDR.all = 0x6E20 //Master/Transmitter

// Bit15 = 0; no NACK in receiver mode
//Bit14 = 1; FREE on emulation halt
//Bit13 = 1; STT generate START
// Bit12 = 0; reserved
// Bit11 = 1; STP generate STOP
// Bit10 = 1; MST master mode
// Bit9 = 1; TRX ****master - transmitter mode****
// Bit8 = 0; XA 7 bit address mode
// Bit7 = 0; RM nonrepeat mode, I2CCNT determines # of bytes
// Bit6 = 1; DLB no loopback mode.it should be '0', from slide 12-12 corrected by Alex.J.
//Bit5 = 1; IRS I2C module enabled
// Bit4 = 0; STB no start byte mode
// Bit3 = 0; FDF no free data format
// Bit2-0: 0; BC **** 8 bit per data byte****

}
void I2CA_Wait(void)
{
// Wait until the STP bit is cleared from any previous master communication.
// Clearing of this bit by the module is delayed until after the SCD bit is
// set. If this bit is not checked prior to initiating a new message, the
// I2C could get confused.

while (I2caRegs.I2CMDR.bit.STP == 1); // Wait for Stop condition bit to be zero.

while (I2caRegs.I2CSTR.bit.BB == 1); // Wait for Bus Busy to be zero.

}
interrupt void i2c_int1a_isr(void) // I2C-A
{
Uint16 IntSource;

// Read interrupt source
IntSource = I2caRegs.I2CISRC.bit.INTCODE & 0x7;

switch(IntSource)
{
case I2C_NO_ISRC: // =0
break;

case I2C_ARB_ISRC: // =1
break;

case I2C_NACK_ISRC: // =2
break;

case I2C_ARDY_ISRC: // =3
break;

case I2C_RX_ISRC: // =4

break;

case I2C_TX_ISRC: // =5
break;

case I2C_SCD_ISRC: // =6
break;

case I2C_AAS_ISRC: // =7
break;

default:
asm(" ESTOP0"); // Halt on invalid number.
}

// Enable future I2C (PIE Group 8) interrupts
PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
}