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TMS320F28027F: Lab10A: Damaged inverter while overmodulating

Jason Tribe
Prodigy 220 points
Part Number: TMS320F28027F
Other Parts Discussed in Thread: DRV8301, MOTORWARE

Hi,

We have developed a three phase inverter on which I am running a modified version of the DRV8301Kit motorware labs. The main modifications to the code was done because we are using the UCC21220DR gate drivers instead of a DRV8301. The only other hardware difference is that we have placed our three current sense resistors in series with the motor phases instead of in the negative leg of the IGBT's.

All the labs up until Lab10A have worked perfectly in terms of controlling the speed of the motor. The issue I am having is when running the inverter into over modulation region. As soon as the inverter requests a VS_MAG above 0.57 the power supply driving our inverter current limits and running the inverter from a non-current limited supply results in damage to the inverter. The damage always occurs to both IGBT's in one of the three inverter legs which tells me that they are turning on at the same time for some reason.

Based on my understanding of the software, with our current sense resistors being placed in series with the motor phases we don't require current reconstruction as the phase currents can always be measured regardless of the value of the IGBT's duty cycle, but running the other labs with a USER_MAX_VS_MAG_PU set to 2/3 results in the same problem. 

Does anyone have any recommendations on what I have done wrong or what might be the issue?

 

  • 0
    TI__Guru** 114520 points

    The current reconstruction algorithm is necessary if you want to use low-side current shunt and overmodulation when the maximum magnitude of PWM output is higher than 0.5, and the current reconstruction algorithm needs very high-quality feedback current signals, especially the USER_MAX_VS_MAG_PU is higher than 0.57.

    Yes, you don't need the current reconstruction algorithm if you are using inline current shunt or hall sensor on motor lines. Please make sure that the deadband time is enough for FET and gate driver.