TMS320F280049: Gurantee reliable receiving when using CAN in FIFO mode

You mentioned " the fifo might be reset".

The fifo will not be reset in this scenario. Refer below sections from TRM.

27.12.11 Storing Received Messages in FIFO Buffers

27.12.12 Reading from a FIFO Buffer

In fifo reading code, however, of cause you reset all the fifos after reading.

My question is, if 3rd frame is receiving by mailbox exactly when reading code is executed. In this code, of cause, seems only 2 frames have already been received. Thus we read these 2 frames and reset the FIFO for next read. Under this condition, what will happen to the 3rd frame that has been writing to a mailbox 3? Will it be loaded into the 1st mailbox?

Regards,

Brian

if the last message in the frame is not received i suppose you shouldn't reset the fifo.

Regards

Baskaran

Then how could I know that there is another message being received? I believe CAN module will only set the new data flag after the receiving has been finished. 

i suppose you need to check the EoB flag.

From TRM -> "The EoB (End of Buffer) bits of all but the last of the FIFO Buffer's message objects are '0', in the last one the EoB bit is '1'."

I believe the EOB flag is set when trying to config a mailbox as the last one of a FIFO. It does not indicate anything.

To make simple, my customer question is if a CAN message is comming when the code is trying to read the FIFOs, how can he guarantee the comming message can be received correctly? 

Obviously, the regular operation is you read alll the messages and clears FIFOs to gurantee the next message will received by the 1st mailbox. But if a message is comming right before we clear the FIFO, will it recieved by the first mailbox or follow the current fifo?

Hi Brian,

Did the above post clarify your questions? If so, can you please close the thread by clicking the "Verify Answer" button?

Regards,
Praveen