This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi Team,
For PTO that from the absolute encoder to QEP, my customer are working on this function and try to find out a solution that use CLB+CPU to implement, now they still have some question that need your help to clarify.
They want to use CLB to implement the below function, other function will be done by CPU.
In a control period, they want to use CLB to generate several PWM waveform, and the PWM period is able to be configured, also the remainder time will be calculated and feedback to CPU for further calculation.
For example, if a control period is 10us, they want to generate 3 PWM waveform, and each PWM period is 3us, then the remainder will be 1us, at the end of this control period(10us), CLB can generate a interrupt to CPU to tell the remainder is 1us.
Question is that is it possible to implement the above function on CLB?
Yes this is possible through the CLB.
You will use a COUNTER module as the core of the PWM generation. You will use one HLC event and FIFO to send the 10us total length information and 3us period of the timer and start the counters. Then at the end you can use another HLC event to send back the 1us through the FIFO and generate an interrupt.
Read this example, it should cover all the basic logic and steps to implement a design similar to this. http://www.ti.com/lit/an/spracl3/spracl3.pdf
Nima