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TMS320F28388D: The initial S0 state of FSM in the CLB moudle

Part Number: TMS320F28388D

Hi,

I'm confused about the initial s0 state of FSM,  I don't know the initial state of S0 is “0” or "1"?

For example, if the logic was set to "S0=e0&s0",  so, in the first clock cycle, the s0 is "0" or "1" or "e0"?

Waiting for your reply

Thank you very much