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Hi,
I'm confused about the initial s0 state of FSM, I don't know the initial state of S0 is “0” or "1"?
For example, if the logic was set to "S0=e0&s0", so, in the first clock cycle, the s0 is "0" or "1" or "e0"?
Waiting for your reply
Thank you very much
Hello,
The initial state of FSM s0 output is 0. Please see chapter 2.3.3.2 of the applications report below:
Regards,
PEter