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TMS320F28069: two TMS320F28069 PWM for synchronization

user5840537
Intellectual 295 points
Part Number: TMS320F28069

Phenomenon:

Two independent DSPs (TMS320F28069PAG) generate PWMs with fixed frequency (20kHz) and fixed duty cycle (50%) respectively. Test the PWM waveforms of the two DSPs with an oscilloscope. Set one of the PWM rising edges as the trigger). At this time, the two DSPs output PWM with the same frequency and the same duty cycle, but there is relative movement between the PWM. The frequency of the two DSP crystals is 20MHz, and the internal clock is 90MHz. All circuits remain the same.

 The frequency of the two DSP crystals is 20MHz, and the internal clock is 90MHz. All circuits remain the same.

 The EPWM configuration is as follows:

  EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;        

  EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;

  EPwm1Regs.CMPA.half.CMPA = EPWM1_TIMER_TBPRD;

  EPwm1Regs.CMPA.half.CMPAHR = 0;

  EPwm1Regs.CMPB = EPWM1_TIMER_TBPRD;

  EPwm1Regs.TBPHS.all = 0;

  EPwm1Regs.TBCTR = 0;

  EPwm1Regs.TBPHS.half.TBPHS = 0;

  EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;

  EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;

  EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP;

EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;

  EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;

  EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

  EPwm1Regs.TBCTL.bit.FREE_SOFT = 3;

  EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD;

  EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD;

  EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

  EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

  EPwm1Regs.AQCTLA.bit.ZRO= AQ_SET;

  EPwm1Regs.AQCTLA.bit.PRD= AQ_CLEAR;

  • 0
    TI__Genius 10845 points

    Hi,

    Since the two DSP's  EPWM clocks are not synchronized there is  relative movement between the PWMs. You might want to synchronise the 2 PWMs using time-base synchronization scheme wherein EPWM1 from one DSP can be used to synchronize the PWM in another DSP.

    Thanks

    Vasudha

  • 0 in reply to Vasudha Bhadoria
    TI__Mastermind 42195 points

    Vasudha's recommendation is correct, you should use the PWM's external synchronization mechanism.  

    If you wish to eliminate the slow long-term drift periodic synchronizations will work, alternatively you could share the same clock source to both devices. That should keep them very similar, only varying by minor PLL differences.

    Regards,
    Cody