TMS320F280049C: No EPWM output if change CMD file from RAM to Flash

Rayna Wang

Part Number: TMS320F280049C

Hi Expert,

There's a strange issue, that when change cmd file from RAM to flash, there's no EPWM output wave while with "ram_cmd" file, the EPWM output is normal.

Could you please provide some suggestions about how to debug this issue? Thanks!

Attached falsh_cmd and flash_map file as below.

28004x_cla_ram_link_cmd2.txt

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MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x080000, length = 0x000002
   RAMM0            : origin = 0x0000F3, length = 0x00030D
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
   /* BANK 0 */
   FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
   FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */
   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
   FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x000FF0 /* on-chip Flash */
//   FLASH_BANK1_SEC15_RSVD : origin = 0x09FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 :
   BOOT_RSVD       : origin = 0x000002, length = 0x0000F1     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800
   RAMGS0           : origin = 0x00C000, length = 0x002000
   RAMGS1           : origin = 0x00E000, length = 0x002000
   RAMGS2           : origin = 0x010000, length = 0x002000
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN            : origin = 0x080000, length = 0x000002
   RAMM0            : origin = 0x0000F3, length = 0x00030D

   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002

/* Flash sectors */
   /* BANK 0 */
   FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE	/* on-chip Flash */
   FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000	/* on-chip Flash */

   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x000FF0	/* on-chip Flash */

//   FLASH_BANK1_SEC15_RSVD : origin = 0x09FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x0000F1     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800

   RAMGS0           : origin = 0x00C000, length = 0x002000
   RAMGS1           : origin = 0x00E000, length = 0x002000
   RAMGS2           : origin = 0x010000, length = 0x002000
   RAMGS3           : origin = 0x012000, length = 0x001FF8
//   RAMGS3_RSVD      : origin = 0x013FF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080

}


SECTIONS
{
   .cinit           : > FLASH_BANK0_SEC1,     PAGE = 0, ALIGN(4)
   .text            : >>FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3 | FLASH_BANK0_SEC5,   PAGE = 0, ALIGN(4)
   codestart        : > BEGIN       PAGE = 0, ALIGN(4)
   
   .stack           : > RAMM1        PAGE = 1
   .switch          : > FLASH_BANK0_SEC1,     PAGE = 0, ALIGN(4)

#if defined(__TI_EABI__)
   .init_array      : > FLASH_BANK0_SEC1,       PAGE = 0,       ALIGN(4)
   .bss             : > RAMLS5,       PAGE = 1
   .bss:output      : > RAMLS5,       PAGE = 1
   .bss:cio         : > RAMLS5,       PAGE = 1
   .data            : > RAMLS6,       PAGE = 1
   .sysmem          : > RAMLS6,       PAGE = 1
   .const           : > FLASH_BANK0_SEC4,       PAGE = 0,       ALIGN(4)
#else
   .pinit           : > FLASH_BANK0_SEC1,       PAGE = 0,       ALIGN(4)
   .ebss            : >>RAMLS5 | RAMLS6,       PAGE = 1
   .esysmem         : > RAMLS6,       PAGE = 1
   .cio             : > RAMLS5,       PAGE = 1
   .econst          : > FLASH_BANK0_SEC4,    PAGE = 0, ALIGN(4)
#endif

   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1
    
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   

#if defined(__TI_EABI__)
    /* CLA specific sections */
    Cla1Prog        : LOAD = FLASH_BANK0_SEC4,
                      RUN = RAMLS0,
                      LOAD_START(Cla1ProgLoadStart),
                      RUN_START(Cla1ProgRunStart),
                      LOAD_SIZE(Cla1ProgLoadSize),
                      PAGE = 0, ALIGN(4)
#else
    /* CLA specific sections */
    Cla1Prog        : LOAD = FLASH_BANK0_SEC4,
                      RUN = RAMLS0,
                      LOAD_START(_Cla1ProgLoadStart),
                      RUN_START(_Cla1ProgRunStart),
                      LOAD_SIZE(_Cla1ProgLoadSize),
                      PAGE = 0, ALIGN(4)
#endif
  
    
    Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
    CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

#if defined(__TI_EABI__)
   .TI.ramfunc      : LOAD = FLASH_BANK0_SEC1,
                      RUN = RAMLS4
                      LOAD_START(RamfuncsLoadStart),
                      LOAD_SIZE(RamfuncsLoadSize),
                      LOAD_END(RamfuncsLoadEnd),
                      RUN_START(RamfuncsRunStart),
                      RUN_SIZE(RamfuncsRunSize),
                      RUN_END(RamfuncsRunEnd),
                      PAGE = 0, ALIGN(4)
#else
   .TI.ramfunc      : LOAD = FLASH_BANK0_SEC1,
                      RUN = RAMLS4
                      LOAD_START(_RamfuncsLoadStart),
                      LOAD_SIZE(_RamfuncsLoadSize),
                      LOAD_END(_RamfuncsLoadEnd),
                      RUN_START(_RamfuncsRunStart),
                      RUN_SIZE(_RamfuncsRunSize),
                      RUN_END(_RamfuncsRunEnd),
                      PAGE = 0, ALIGN(4)
#endif

   .scratchpad      : > RAMLS1,           PAGE = 1
   .bss_cla         : > RAMLS1,           PAGE = 1

   Cla1DataRam      : > RAMLS2,           PAGE = 1
   cla_shared       : > RAMLS1,           PAGE = 1
#if defined(__TI_EABI__)
   .const_cla      : LOAD = FLASH_BANK0_SEC2,
                      RUN = RAMLS3,
                      RUN_START(Cla1ConstRunStart),
                      LOAD_START(Cla1ConstLoadStart),
                      LOAD_SIZE(Cla1ConstLoadSize),
                      PAGE = 0, ALIGN(4)
#else
   .const_cla      : LOAD = FLASH_BANK0_SEC2,
                      RUN = RAMLS3,
                      RUN_START(_Cla1ConstRunStart),
                      LOAD_START(_Cla1ConstLoadStart),
                      LOAD_SIZE(_Cla1ConstLoadSize),
                      PAGE = 0, ALIGN(4)
#endif
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0576.QT2_AC_side_map.txt

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******************************************************************************
             TMS320C2000 Linker PC v18.12.4                    
******************************************************************************
>> Linked Sun Aug 30 23:15:19 2020
OUTPUT FILE NAME:   <QT2_AC_side.out>
ENTRY POINT SYMBOL: "code_start"  address: 00080000
MEMORY CONFIGURATION
         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  RAMM0                 000000f3   0000030d  00000000  0000030d  RWIX
  RAMLS0                00008000   00000800  0000070c  000000f4  RWIX
  RAMLS3                00009800   00000800  00000088  00000778  RWIX
  RAMLS4                0000a000   00000800  00000130  000006d0  RWIX
  BEGIN                 00080000   00000002  00000002  00000000  RWIX
  FLASH_BANK0_SEC0      00080002   00000ffe  00000000  00000ffe  RWIX
  FLASH_BANK0_SEC1      00081000   00001000  00000168  00000e98  RWIX
  FLASH_BANK0_SEC2      00082000   00001000  00001000  00000000  RWIX
  FLASH_BANK0_SEC3      00083000   00001000  00001000  00000000  RWIX
  FLASH_BANK0_SEC4      00084000   00001000  00000e56  000001aa  RWIX
  FLASH_BANK0_SEC5      00085000   00001000  000006a0  00000960  RWIX
  FLASH_BANK0_SEC6      00086000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC7      00087000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC8      00088000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC9      00089000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC10     0008a000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC11     0008b000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC12     0008c000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC13     0008d000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC14     0008e000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC15     0008f000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC0      00090000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC1      00091000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC2      00092000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC3      00093000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC4      00094000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC5      00095000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC6      00096000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC7      00097000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC8      00098000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC9      00099000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC10     0009a000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC11     0009b000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC12     0009c000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC13     0009d000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC14     0009e000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC15     0009f000   00000ff0  00000000  00000ff0  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX
PAGE 1:
  BOOT_RSVD             00000002   000000f1  00000000  000000f1  RWIX
  RAMM1                 00000400   000003f8  000003f8  00000000  RWIX
  ADCA_RESULT           00000b00   00000020  00000000  00000020  RWIX
  ADCB_RESULT           00000b20   00000020  00000000  00000020  RWIX
  ADCC_RESULT           00000b40   00000020  00000000  00000020  RWIX
  CPU_TIMER0            00000c00   00000008  00000000  00000008  RWIX
  CPU_TIMER1            00000c08   00000008  00000000  00000008  RWIX
  CPU_TIMER2            00000c10   00000008  00000000  00000008  RWIX
  PIE_CTRL              00000ce0   00000020  00000000  00000020  RWIX
  PIE_VECT              00000d00   00000200  00000000  00000200  RWIX
  DMA                   00001000   00000200  00000000  00000200  RWIX
  CLA1                  00001400   00000080  00000000  00000080  RWIX
  CLA1_MSGRAMLOW        00001480   00000080  00000000  00000080  RWIX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

******************************************************************************
             TMS320C2000 Linker PC v18.12.4                    
******************************************************************************
>> Linked Sun Aug 30 23:15:19 2020

OUTPUT FILE NAME:   <QT2_AC_side.out>
ENTRY POINT SYMBOL: "code_start"  address: 00080000


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  RAMM0                 000000f3   0000030d  00000000  0000030d  RWIX
  RAMLS0                00008000   00000800  0000070c  000000f4  RWIX
  RAMLS3                00009800   00000800  00000088  00000778  RWIX
  RAMLS4                0000a000   00000800  00000130  000006d0  RWIX
  BEGIN                 00080000   00000002  00000002  00000000  RWIX
  FLASH_BANK0_SEC0      00080002   00000ffe  00000000  00000ffe  RWIX
  FLASH_BANK0_SEC1      00081000   00001000  00000168  00000e98  RWIX
  FLASH_BANK0_SEC2      00082000   00001000  00001000  00000000  RWIX
  FLASH_BANK0_SEC3      00083000   00001000  00001000  00000000  RWIX
  FLASH_BANK0_SEC4      00084000   00001000  00000e56  000001aa  RWIX
  FLASH_BANK0_SEC5      00085000   00001000  000006a0  00000960  RWIX
  FLASH_BANK0_SEC6      00086000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC7      00087000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC8      00088000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC9      00089000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC10     0008a000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC11     0008b000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC12     0008c000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC13     0008d000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC14     0008e000   00001000  00000000  00001000  RWIX
  FLASH_BANK0_SEC15     0008f000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC0      00090000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC1      00091000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC2      00092000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC3      00093000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC4      00094000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC5      00095000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC6      00096000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC7      00097000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC8      00098000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC9      00099000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC10     0009a000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC11     0009b000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC12     0009c000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC13     0009d000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC14     0009e000   00001000  00000000  00001000  RWIX
  FLASH_BANK1_SEC15     0009f000   00000ff0  00000000  00000ff0  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX

PAGE 1:
  BOOT_RSVD             00000002   000000f1  00000000  000000f1  RWIX
  RAMM1                 00000400   000003f8  000003f8  00000000  RWIX
  ADCA_RESULT           00000b00   00000020  00000000  00000020  RWIX
  ADCB_RESULT           00000b20   00000020  00000000  00000020  RWIX
  ADCC_RESULT           00000b40   00000020  00000000  00000020  RWIX
  CPU_TIMER0            00000c00   00000008  00000000  00000008  RWIX
  CPU_TIMER1            00000c08   00000008  00000000  00000008  RWIX
  CPU_TIMER2            00000c10   00000008  00000000  00000008  RWIX
  PIE_CTRL              00000ce0   00000020  00000000  00000020  RWIX
  PIE_VECT              00000d00   00000200  00000000  00000200  RWIX
  DMA                   00001000   00000200  00000000  00000200  RWIX
  CLA1                  00001400   00000080  00000000  00000080  RWIX
  CLA1_MSGRAMLOW        00001480   00000080  00000000  00000080  RWIX
  CLA1_MSGRAMHIGH       00001500   00000080  00000000  00000080  RWIX
  EPWM1                 00004000   00000100  00000000  00000100  RWIX
  EPWM2                 00004100   00000100  00000000  00000100  RWIX
  EPWM3                 00004200   00000100  00000000  00000100  RWIX
  EPWM4                 00004300   00000100  00000000  00000100  RWIX
  EPWM5                 00004400   00000100  00000000  00000100  RWIX
  EPWM6                 00004500   00000100  00000000  00000100  RWIX
  EPWM7                 00004600   00000100  00000000  00000100  RWIX
  EPWM8                 00004700   00000100  00000000  00000100  RWIX
  EQEP1                 00005100   00000040  00000000  00000040  RWIX
  EQEP2                 00005140   00000040  00000000  00000040  RWIX
  ECAP1                 00005200   00000040  00000000  00000040  RWIX
  ECAP2                 00005240   00000040  00000000  00000040  RWIX
  ECAP3                 00005280   00000040  00000000  00000040  RWIX
  ECAP4                 000052c0   00000040  00000000  00000040  RWIX
  ECAP5                 00005300   00000040  00000000  00000040  RWIX
  ECAP6                 00005340   00000040  00000000  00000040  RWIX
  ECAP7                 00005380   00000040  00000000  00000040  RWIX
  PGA1                  00005b00   00000010  00000000  00000010  RWIX
  PGA2                  00005b10   00000010  00000000  00000010  RWIX
  PGA3                  00005b20   00000010  00000000  00000010  RWIX
  PGA4                  00005b30   00000010  00000000  00000010  RWIX
  PGA5                  00005b40   00000010  00000000  00000010  RWIX
  PGA6                  00005b50   00000010  00000000  00000010  RWIX
  PGA7                  00005b60   00000010  00000000  00000010  RWIX
  DACA                  00005c00   00000010  00000000  00000010  RWIX
  DACB                  00005c10   00000010  00000000  00000010  RWIX
  CMPSS1                00005c80   00000020  00000000  00000020  RWIX
  CMPSS2                00005ca0   00000020  00000000  00000020  RWIX
  CMPSS3                00005cc0   00000020  00000000  00000020  RWIX
  CMPSS4                00005ce0   00000020  00000000  00000020  RWIX
  CMPSS5                00005d00   00000020  00000000  00000020  RWIX
  CMPSS6                00005d20   00000020  00000000  00000020  RWIX
  CMPSS7                00005d40   00000020  00000000  00000020  RWIX
  SDFM1                 00005e00   00000080  00000000  00000080  RWIX
  SPIA                  00006100   00000010  00000000  00000010  RWIX
  SPIB                  00006110   00000010  00000000  00000010  RWIX
  CLAPROMCRC            000061c0   00000020  00000000  00000020  RWIX
  PMBUSA                00006400   00000020  00000000  00000020  RWIX
  FSITXA                00006600   00000080  00000000  00000080  RWIX
  FSIRXA                00006680   00000080  00000000  00000080  RWIX
  LINA                  00006a00   00000100  00000000  00000100  RWIX
  LINB                  00006b00   00000100  00000000  00000100  RWIX
  WD                    00007000   00000040  00000000  00000040  RWIX
  NMIINTRUPT            00007060   00000010  00000000  00000010  RWIX
  XINT                  00007070   00000010  00000000  00000010  RWIX
  SCIA                  00007200   00000010  00000000  00000010  RWIX
  SCIB                  00007210   00000010  00000000  00000010  RWIX
  I2CA                  00007300   00000040  00000000  00000040  RWIX
  ADCA                  00007400   00000080  00000000  00000080  RWIX
  ADCB                  00007480   00000080  00000000  00000080  RWIX
  ADCC                  00007500   00000080  00000000  00000080  RWIX
  INPUT_XBAR            00007900   00000020  00000000  00000020  RWIX
  XBAR                  00007920   00000020  00000000  00000020  RWIX
  SYNC_SOC              00007940   00000010  00000000  00000010  RWIX
  DMACLASRCSEL          00007980   00000040  00000000  00000040  RWIX
  EPWM_XBAR             00007a00   00000040  00000000  00000040  RWIX
  CLB_XBAR              00007a40   00000040  00000000  00000040  RWIX
  OUTPUT_XBAR           00007a80   00000040  00000000  00000040  RWIX
  GPIOCTRL              00007c00   00000200  00000000  00000200  RWIX
  GPIODAT               00007f00   00000040  00000000  00000040  RWIX
  RAMLS1                00008800   00000800  0000002a  000007d6  RWIX
  RAMLS2                00009000   00000800  00000000  00000800  RWIX
  RAMLS5                0000a800   00000800  000007e6  0000001a  RWIX
  RAMLS6                0000b000   00000800  00000012  000007ee  RWIX
  RAMLS7                0000b800   00000800  00000000  00000800  RWIX
  RAMGS0                0000c000   00002000  00000000  00002000  RWIX
  RAMGS1                0000e000   00002000  00000000  00002000  RWIX
  RAMGS2                00010000   00002000  00000000  00002000  RWIX
  RAMGS3                00012000   00001ff8  00000000  00001ff8  RWIX
  CANA                  00048000   00000800  00000000  00000800  RWIX
  CANB                  0004a000   00000800  00000000  00000800  RWIX
  DEV_CFG               0005d000   00000180  00000000  00000180  RWIX
  CLK_CFG               0005d200   00000100  00000000  00000100  RWIX
  CPU_SYS               0005d300   00000100  00000000  00000100  RWIX
  PERIPH_AC             0005d500   00000200  00000000  00000200  RWIX
  ANALOG_SUBSYS         0005d700   00000100  00000000  00000100  RWIX
  DCC0                  0005e700   00000040  00000000  00000040  RWIX
  ERAD_GLOBAL           0005e800   00000013  00000000  00000013  RWIX
  ERAD_HWBP1            0005e900   00000008  00000000  00000008  RWIX
  ERAD_HWBP2            0005e908   00000008  00000000  00000008  RWIX
  ERAD_HWBP3            0005e910   00000008  00000000  00000008  RWIX
  ERAD_HWBP4            0005e918   00000008  00000000  00000008  RWIX
  ERAD_HWBP5            0005e920   00000008  00000000  00000008  RWIX
  ERAD_HWBP6            0005e928   00000008  00000000  00000008  RWIX
  ERAD_HWBP7            0005e930   00000008  00000000  00000008  RWIX
  ERAD_HWBP8            0005e938   00000008  00000000  00000008  RWIX
  ERAD_CTR1             0005e980   00000010  00000000  00000010  RWIX
  ERAD_CTR2             0005e990   00000010  00000000  00000010  RWIX
  ERAD_CTR3             0005e9a0   00000010  00000000  00000010  RWIX
  ERAD_CTR4             0005e9b0   00000010  00000000  00000010  RWIX
  DCSM_BANK0_Z1         0005f000   00000030  00000000  00000030  RWIX
  DCSM_BANK0_Z2         0005f040   00000030  00000000  00000030  RWIX
  DCSM_COMMON           0005f070   00000010  00000000  00000010  RWIX
  DCSM_BANK1_Z1         0005f100   00000030  00000000  00000030  RWIX
  DCSM_BANK1_Z2         0005f140   00000030  00000000  00000030  RWIX
  MEMCFG                0005f400   00000080  00000000  00000080  RWIX
  ACCESSPROTECTION      0005f4c0   00000040  00000000  00000040  RWIX
  MEMORYERROR           0005f500   00000040  00000000  00000040  RWIX
  FLASH0_CTRL           0005f800   00000300  00000000  00000300  RWIX
  FLASH0_ECC            0005fb00   00000040  00000000  00000040  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
codestart 
*          0    00080000    00000002     
                  00080000    00000002     f28004x_codestartbranch.obj (codestart)

.cinit     0    00081130    00000038     
                  00081130    0000000c     (.cinit..data.load) [load image, compression = lzss]
                  0008113c    00000006     (.cinit.cla_shared.load) [load image]
                  00081142    00000006     (__TI_handler_table)
                  00081148    00000004     (.cinit..bss.load) [load image, compression = zero_init]
                  0008114c    00000004     (.cinit..bss_cla.load) [load image, compression = zero_init]
                  00081150    00000004     (.cinit..scratchpad.load) [load image, compression = zero_init]
                  00081154    00000014     (__TI_cinit_table)

.stack     1    00000400    000003f8     UNINITIALIZED
                  00000400    000003f8     --HOLE--

.init_array 
*          0    00081000    00000000     UNINITIALIZED

.bss       1    0000a800    000007e6     UNINITIALIZED
                  0000a800    000007d0     QT2_AC_side.obj (.bss:AdcBuf_VAC_A)
                  0000afd0    00000014     Isr.obj (.bss)
                  0000afe4    00000002     QT2_AC_side.obj (.bss)

.data      1    0000b000    00000012     UNINITIALIZED
                  0000b000    00000008     Isr.obj (.data)
                  0000b008    00000006     rts2800_fpu32_eabi.lib : exit.c.obj (.data)
                  0000b00e    00000002                            : _lock.c.obj (.data:_lock)
                  0000b010    00000002                            : _lock.c.obj (.data:_unlock)

.const     0    00084000    0000074a     
                  00084000    00000114     Isr.obj (.const:.string)
                  00084114    000000d2     QT2_AC_side.obj (.const:.string)
                  000841e6    000000b3     driverlib_eabi.lib : flash.obj (.const:.string)
                  00084299    00000001     --HOLE-- [fill = 0]
                  0008429a    000000b2                        : sysctl.obj (.const:.string)
                  0008434c    000000b0                        : gpio.obj (.const:.string)
                  000843fc    0000008d     cmpss.obj (.const:.string)
                  00084489    00000001     --HOLE-- [fill = 0]
                  0008448a    0000008c     timer.obj (.const:.string)
                  00084516    0000008a     cla.obj (.const:.string)
                  000845a0    0000005a     driverlib_eabi.lib : memcfg.obj (.const:.string)
                  000845fa    00000058                        : epwm.obj (.const:.string)
                  00084652    00000057                        : adc.obj (.const:.string)
                  000846a9    00000001     --HOLE-- [fill = 0]
                  000846aa    00000044     epwm.obj (.const:.string)
                  000846ee    00000043     adc.obj (.const:.string)
                  00084731    00000001     --HOLE-- [fill = 0]
                  00084732    00000013     device.obj (.const:.string)
                  00084745    00000001     --HOLE-- [fill = 0]
                  00084746    00000004     Isr.obj (.const)

.reset     0    003fffc0    00000000     DSECT

Cla1Prog   0    0008474c    0000070c     RUN ADDR = 00008000
                  0008474c    00000110     QT2_AC.obj (Cla1Prog:Cla1Task4)
                  0008485c    000000d0     QT2_AC.obj (Cla1Prog:Cla1Task1)
                  0008492c    000000d0     QT2_AC.obj (Cla1Prog:Cla1Task2)
                  000849fc    000000d0     QT2_AC.obj (Cla1Prog:Cla1Task3)
                  00084acc    000000ca     QT2_AC.obj (Cla1Prog:EPWM_isBaseValid)
                  00084b96    000000b6     QT2_AC.obj (Cla1Prog:ECAP_isBaseValid)
                  00084c4c    000000a4     QT2_AC.obj (Cla1Prog:EPWM_setCounterCompareValue)
                  00084cf0    00000076     QT2_AC.obj (Cla1Prog:CLAsin_inline)
                  00084d66    0000005a     QT2_AC.obj (Cla1Prog:EPWM_clearEventTriggerInterruptFlag)
                  00084dc0    00000048     QT2_AC.obj (Cla1Prog:ECAP_getTimeBaseCounter)
                  00084e08    00000048     QT2_AC.obj (Cla1Prog:EPWM_getDigitalCompareCaptureCount)
                  00084e50    00000008     QT2_AC.obj (Cla1Prog:Cla1Task8)

.TI.ramfunc 
*          0    00081000    00000130     RUN ADDR = 0000a000
                  00081000    00000044     driverlib_eabi.lib : flash.obj (.TI.ramfunc:Flash_initModule)
                  00081044    0000002d                        : flash.obj (.TI.ramfunc:Flash_setBankPowerMode)
                  00081071    00000026                        : flash.obj (.TI.ramfunc:Flash_setWaitstates)
                  00081097    0000001e                        : flash.obj (.TI.ramfunc:Flash_setPumpPowerMode)
                  000810b5    00000018                        : flash.obj (.TI.ramfunc:Flash_disableCache)
                  000810cd    00000018                        : flash.obj (.TI.ramfunc:Flash_disablePrefetch)
                  000810e5    00000018                        : flash.obj (.TI.ramfunc:Flash_enableCache)
                  000810fd    00000018                        : flash.obj (.TI.ramfunc:Flash_enablePrefetch)
                  00081115    00000017                        : flash.obj (.TI.ramfunc:Flash_enableECC)
                  0008112c    00000004                        : sysctl.obj (.TI.ramfunc)

.const_cla 
*          0    00082000    00000088     RUN ADDR = 00009800
                  00082000    00000088     QT2_AC.obj (.const_cla)

.scratchpad 
*          1    00008800    00000010     UNINITIALIZED
                  00008800    00000004     QT2_AC.obj (.scratchpad:Cla1Prog:EPWM_getDigitalCompareCaptureCount)
                  00008800    0000000c     QT2_AC.obj (.scratchpad:Cla1Prog:CLAsin_inline)
                  00008800    0000000a     QT2_AC.obj (.scratchpad:Cla1Prog:EPWM_setCounterCompareValue)
                  00008800    00000004     QT2_AC.obj (.scratchpad:Cla1Prog:EPWM_clearEventTriggerInterruptFlag)
                  00008800    00000004     QT2_AC.obj (.scratchpad:Cla1Prog:ECAP_getTimeBaseCounter)
                  00008804    00000004     QT2_AC.obj (.scratchpad:Cla1Prog:ECAP_isBaseValid)
                  0000880a    00000004     QT2_AC.obj (.scratchpad:Cla1Prog:EPWM_isBaseValid)
                  0000880e    00000002     QT2_AC.obj (.scratchpad:Cla1Prog:Cla1Task1)
                  0000880e    00000002     QT2_AC.obj (.scratchpad:Cla1Prog:Cla1Task2)
                  0000880e    00000002     QT2_AC.obj (.scratchpad:Cla1Prog:Cla1Task3)
                  0000880e    00000002     QT2_AC.obj (.scratchpad:Cla1Prog:Cla1Task4)

.bss_cla   1    00008810    00000018     UNINITIALIZED
                  00008810    00000018     QT2_AC.obj (.bss_cla)

cla_shared 
*          1    00008828    00000002     UNINITIALIZED
                  00008828    00000002     Isr.obj (cla_shared:init)

Cla1SoftIntRegsFile 
*          1    00000ce0    00000000     DSECT

.text.1    0    00082088    00000f78     
                  00082088    000007ba     QT2_AC_side.obj (.text)
                  00082842    0000076d     epwm.obj (.text)
                  00082faf    00000051     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_getClock)

.text.2    0    00083000    00001000     
                  00083000    00000469     Isr.obj (.text:retain)
                  00083469    00000210     adc.obj (.text)
                  00083679    000001e5     Isr.obj (.text)
                  0008385e    000001d0     timer.obj (.text)
                  00083a2e    000001a6     device.obj (.text)
                  00083bd4    00000180     cmpss.obj (.text)
                  00083d54    000000fb     cla.obj (.text)
                  00083e4f    000000b6     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_setClock)
                  00083f05    0000009b                        : sysctl.obj (.text:SysCtl_isPLLValid)
                  00083fa0    0000005b                        : sysctl.obj (.text:SysCtl_selectOscSource)
                  00083ffb    00000002                        : interrupt.obj (.text:Interrupt_illegalOperationHandler)
                  00083ffd    00000002                        : interrupt.obj (.text:Interrupt_nmiHandler)
                  00083fff    00000001     rts2800_fpu32_eabi.lib : startup.c.obj (.text)

.text.3    0    00085000    000006a0     
                  00085000    00000064     driverlib_eabi.lib : adc.obj (.text:ADC_setVREF)
                  00085064    00000056                        : sysctl.obj (.text:DCC_setCounterSeeds)
                  000850ba    00000052                        : gpio.obj (.text:GPIO_setPadConfig)
                  0008510c    0000003d                        : interrupt.obj (.text:Interrupt_initModule)
                  00085149    0000003b                        : gpio.obj (.text:GPIO_setAnalogMode)
                  00085184    00000038                        : memcfg.obj (.text:MemCfg_setLSRAMMasterSel)
                  000851bc    00000037                        : gpio.obj (.text:GPIO_setPinConfig)
                  000851f3    00000034                        : interrupt.obj (.text:Interrupt_enable)
                  00085227    00000033                        : epwm.obj (.text:EPWM_isBaseValid)
                  0008525a    00000031                        : gpio.obj (.text:GPIO_setDirectionMode)
                  0008528b    00000031     rts2800_fpu32_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
                  000852bc    0000002e     driverlib_eabi.lib : xbar.obj (.text:XBAR_setEPWMMuxConfig)
                  000852ea    0000002e                        : xbar.obj (.text:XBAR_setOutputMuxConfig)
                  00085318    0000002b     rts2800_fpu32_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
                  00085343    0000002a                            : fd_cmp28.asm.obj (.text)
                  0008536d    00000029                            : exit.c.obj (.text)
                  00085396    00000026     driverlib_eabi.lib : cla.obj (.text:CLA_setTriggerSource)
                  000853bc    00000025                        : sysctl.obj (.text:DCC_enableSingleShotMode)
                  000853e1    00000024                        : sysctl.obj (.text:SysCtl_selectXTAL)
                  00085405    00000022                        : sysctl.obj (.text:SysCtl_pollX1Counter)
                  00085427    00000020                        : interrupt.obj (.text:Interrupt_initVectorTable)
                  00085447    0000001f                        : sysctl.obj (.text:DCC_setCounter1ClkSource)
                  00085466    0000001d                        : sysctl.obj (.text:DCC_setCounter0ClkSource)
                  00085483    0000001d     rts2800_fpu32_eabi.lib : memcpy.c.obj (.text)
                  000854a0    0000001a     driverlib_eabi.lib : adc.obj (.text:ADC_isBaseValid)
                  000854ba    0000001a                        : sysctl.obj (.text:SysCtl_getLowSpeedClock)
                  000854d4    0000001a                        : sysctl.obj (.text:SysCtl_selectXTALSingleEnded)
                  000854ee    00000017                        : sysctl.obj (.text:DCC_disableDoneSignal)
                  00085505    00000017                        : sysctl.obj (.text:DCC_enableDoneSignal)
                  0008551c    00000017                        : sysctl.obj (.text:SysCtl_enablePeripheral)
                  00085533    00000017     rts2800_fpu32_eabi.lib : boot28.asm.obj (.text)
                  0008554a    00000016     driverlib_eabi.lib : sysctl.obj (.text:DCC_clearDoneFlag)
                  00085560    00000016                        : sysctl.obj (.text:DCC_clearErrorFlag)
                  00085576    00000016                        : sysctl.obj (.text:DCC_disableErrorSignal)
                  0008558c    00000016                        : sysctl.obj (.text:DCC_enableErrorSignal)
                  000855a2    00000016                        : epwm.obj (.text:EPWM_setEmulationMode)
                  000855b8    00000016     rts2800_fpu32_eabi.lib : ul_tofd28.asm.obj (.text)
                  000855ce    00000014     driverlib_eabi.lib : sysctl.obj (.text:DCC_disableModule)
                  000855e2    00000014                        : sysctl.obj (.text:DCC_enableModule)
                  000855f6    00000014                        : gpio.obj (.text:GPIO_isPinValid)
                  0008560a    00000010                        : sysctl.obj (.text:DCC_isBaseValid)
                  0008561a    00000010                        : flash.obj (.text:Flash_isCtrlBaseValid)
                  0008562a    00000010                        : flash.obj (.text:Flash_isECCBaseValid)
                  0008563a    0000000e                        : interrupt.obj (.text:Interrupt_defaultHandler)
                  00085648    0000000d                        : interrupt.obj (.text:Interrupt_disableMaster)
                  00085655    0000000d                        : interrupt.obj (.text:Interrupt_enableMaster)
                  00085662    0000000c     rts2800_fpu32_eabi.lib : args_main.c.obj (.text)
                  0008566e    0000000b     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_isMCDClockFailureDetected)
                  00085679    00000009     rts2800_fpu32_eabi.lib : _lock.c.obj (.text)
                  00085682    00000008                            : copy_decompress_none.c.obj (.text:decompress:none)
                  0008568a    00000007     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_resetMCD)
                  00085691    00000007     rts2800_fpu32_eabi.lib : memset.c.obj (.text)
                  00085698    00000006                            : copy_zero_init.c.obj (.text:decompress:ZI)
                  0008569e    00000002                            : pre_init.c.obj (.text)

MODULE SUMMARY

       Module                        code    ro data   rw data
       ------                        ----    -------   -------
    .\
       QT2_AC_side.obj               1978    210       2002   
       QT2_AC.obj                    3608    272       74     
       epwm.obj                      1901    68        0      
       Isr.obj                       1614    280       30     
       timer.obj                     464     140       0      
       adc.obj                       528     67        0      
       cmpss.obj                     384     141       0      
       cla.obj                       251     138       0      
    +--+-----------------------------+-------+---------+---------+
       Total:                        10728   1316      2106   
                                                              
    .\device\
       device.obj                    422     19        0      
       f28004x_codestartbranch.obj   2       0         0      
    +--+-----------------------------+-------+---------+---------+
       Total:                        424     19        0      
                                                              
    C:\ti\c2000\C2000Ware_3_01_00_00\driverlib\f28004x\driverlib\ccs\Debug\driverlib_eabi.lib
       sysctl.obj                    1053    178       0      
       flash.obj                     632     179       0      
       gpio.obj                      265     176       0      
       adc.obj                       126     87        0      
       interrupt.obj                 189     0         0      
       epwm.obj                      73      88        0      
       memcfg.obj                    56      90        0      
       xbar.obj                      92      0         0      
       cla.obj                       38      0         0      
    +--+-----------------------------+-------+---------+---------+
       Total:                        2524    798       0      
                                                              
    C:\ti\ccs930\ccs\tools\compiler\ti-cgt-c2000_18.12.4.LTS\lib\rts2800_fpu32_eabi.lib
       copy_decompress_lzss.c.obj    49      0         0      
       exit.c.obj                    41      0         6      
       autoinit.c.obj                43      0         0      
       fd_cmp28.asm.obj              42      0         0      
       memcpy.c.obj                  29      0         0      
       boot28.asm.obj                23      0         0      
       ul_tofd28.asm.obj             22      0         0      
       _lock.c.obj                   9       0         4      
       args_main.c.obj               12      0         0      
       copy_decompress_none.c.obj    8       0         0      
       memset.c.obj                  7       0         0      
       copy_zero_init.c.obj          6       0         0      
       pre_init.c.obj                2       0         0      
       startup.c.obj                 1       0         0      
    +--+-----------------------------+-------+---------+---------+
       Total:                        294     0         10     
                                                              
       Stack:                        0       0         1016   
       Linker Generated:             0       56        0      
    +--+-----------------------------+-------+---------+---------+
       Grand Total:                  13970   2189      3132   


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 00081154 records: 5, size/record: 4, table size: 20
	.data: load addr=00081130, load size=0000000c bytes, run addr=0000b000, run size=00000012 bytes, compression=lzss
	cla_shared: load addr=0008113c, load size=00000006 bytes, run addr=00008828, run size=00000002 bytes, compression=copy
	.bss: load addr=00081148, load size=00000004 bytes, run addr=0000a800, run size=000007e6 bytes, compression=zero_init
	.bss_cla: load addr=0008114c, load size=00000004 bytes, run addr=00008810, run size=00000018 bytes, compression=zero_init
	.scratchpad: load addr=00081150, load size=00000004 bytes, run addr=00008800, run size=00000010 bytes, compression=zero_init


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 00081142 records: 3, size/record: 2, table size: 6
	index: 0, handler: __TI_zero_init
	index: 1, handler: __TI_decompress_lzss
	index: 2, handler: __TI_decompress_none


GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address     data page           name
--------    ----------------    ----
00000400      10 (00000400)     __stack

00008810     220 (00008800)     Period_DSP_DCAC_PWMHA
00008812     220 (00008800)     Period_DSP_DCAC_PWMLA
00008814     220 (00008800)     Period_DSP_DCAC_PWM_LS_1
00008816     220 (00008800)     Period_DSP_DCAC_PWM_HS_1
00008818     220 (00008800)     EPWM1_CompareValue
0000881a     220 (00008800)     EPWM2_CompareValue
0000881c     220 (00008800)     EPWM5_CompareValue
0000881e     220 (00008800)     EPWM7_CompareValue
00008820     220 (00008800)     EPWM8_CompareValue
00008822     220 (00008800)     PhaseVB_SENSE
00008824     220 (00008800)     EPWM1_Compare
00008826     220 (00008800)     EPWM2_Compare
00008828     220 (00008800)     phase_VAC_A

0000a800     2a0 (0000a800)     AdcBuf_VAC_A

0000afd2     2bf (0000afc0)     toDel1
0000afd4     2bf (0000afc0)     toDel2
0000afd6     2bf (0000afc0)     toDel3
0000afd8     2bf (0000afc0)     toDel4
0000afda     2bf (0000afc0)     toDel5
0000afdc     2bf (0000afc0)     toDel6
0000afde     2bf (0000afc0)     toDel7
0000afe0     2bf (0000afc0)     toDel8
0000afe2     2bf (0000afc0)     toDel9
0000afe4     2bf (0000afc0)     toDel_ADC_readResult
0000afe5     2bf (0000afc0)     toDel_AdcBufPtr

0000b002     2c0 (0000b000)     phase_VB_SENSE
0000b004     2c0 (0000b000)     Period_VB_SENSE
0000b008     2c0 (0000b000)     __TI_enable_exit_profile_output
0000b00a     2c0 (0000b000)     __TI_cleanup_ptr
0000b00c     2c0 (0000b000)     __TI_dtors_ptr
0000b00e     2c0 (0000b000)     _lock
0000b010     2c0 (0000b000)     _unlock


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

page  address   name                                
----  -------   ----                                
0     00085000  ADC_setVREF                         
1     0000a800  AdcBuf_VAC_A                        
0     0008536d  C$$EXIT                             
0     00085396  CLA_setTriggerSource                
abs   0000fd0a  CLAsincosTable                      
abs   0000fe54  CLAsincosTable_Coef0                
abs   0000fe56  CLAsincosTable_Coef1                
abs   0000fe5a  CLAsincosTable_Coef2                
abs   0000fe5c  CLAsincosTable_Coef3                
abs   0000fe4e  CLAsincosTable_TABLE_SIZEDivTwoPi   
abs   00000088  Cla1ConstLoadSize                   
0     00082000  Cla1ConstLoadStart                  
0     00009800  Cla1ConstRunStart                   
abs   0000070c  Cla1ProgLoadSize                    
0     0008474c  Cla1ProgLoadStart                   
0     00008000  Cla1ProgRunStart                    
0     00008110  Cla1Task1                           
0     000081e0  Cla1Task2                           
0     000082b0  Cla1Task3                           
0     00008000  Cla1Task4                           
0     00008704  Cla1Task8                           
0     00083ae0  Device_enableAllPeripherals         
0     00083a80  Device_init                         
0     00083bbd  Device_initGPIO                     
1     00008824  EPWM1_Compare                       
1     00008818  EPWM1_CompareValue                  
1     00008826  EPWM2_Compare                       
1     0000881a  EPWM2_CompareValue                  
1     0000881c  EPWM5_CompareValue                  
1     0000881e  EPWM7_CompareValue                  
1     00008820  EPWM8_CompareValue                  
0     000855a2  EPWM_setEmulationMode               
0     00083405  EcapTimer_VB_SENSE_StartDeadZone_ISR
0     0000a000  Flash_initModule                    
0     00085149  GPIO_setAnalogMode                  
0     0008525a  GPIO_setDirectionMode               
0     000850ba  GPIO_setPadConfig                   
0     000851bc  GPIO_setPinConfig                   
0     0008361a  InitAdcA_DS3                        
0     000851f3  Interrupt_enable                    
0     0008510c  Interrupt_initModule                
0     00085427  Interrupt_initVectorTable           
0     00085184  MemCfg_setLSRAMMasterSel            
1     00008810  Period_DSP_DCAC_PWMHA               
1     00008812  Period_DSP_DCAC_PWMLA               
1     00008816  Period_DSP_DCAC_PWM_HS_1            
1     00008814  Period_DSP_DCAC_PWM_LS_1            
1     0000b004  Period_VB_SENSE                     
1     00008822  PhaseVB_SENSE                       
0     00081130  RamfuncsLoadEnd                     
abs   00000130  RamfuncsLoadSize                    
0     00081000  RamfuncsLoadStart                   
0     0000a130  RamfuncsRunEnd                      
abs   00000130  RamfuncsRunSize                     
0     0000a000  RamfuncsRunStart                    
0     0000a12c  SysCtl_delay                        
0     00082faf  SysCtl_getClock                     
0     000854ba  SysCtl_getLowSpeedClock             
0     00083f05  SysCtl_isPLLValid                   
0     00083fa0  SysCtl_selectOscSource              
0     000853e1  SysCtl_selectXTAL                   
0     000854d4  SysCtl_selectXTALSingleEnded        
0     00083e4f  SysCtl_setClock                     
0     000852bc  XBAR_setEPWMMuxConfig               
0     000852ea  XBAR_setOutputMuxConfig             
0     00081154  __TI_CINIT_Base                     
0     00081168  __TI_CINIT_Limit                    
0     00081142  __TI_Handler_Table_Base             
0     00081148  __TI_Handler_Table_Limit            
1     000007f8  __TI_STACK_END                      
abs   000003f8  __TI_STACK_SIZE                     
0     00085318  __TI_auto_init_nobinit_nopinit      
1     0000b00a  __TI_cleanup_ptr                    
0     0008528b  __TI_decompress_lzss                
0     00085682  __TI_decompress_none                
1     0000b00c  __TI_dtors_ptr                      
1     0000b008  __TI_enable_exit_profile_output     
abs   ffffffff  __TI_pprof_out_hndl                 
abs   ffffffff  __TI_prof_data_size                 
abs   ffffffff  __TI_prof_data_start                
0     00085698  __TI_zero_init                      
0     00085343  __c28xabi_cmpd                      
0     000855b8  __c28xabi_ultod                     
n/a   UNDEFED   __c_args__                          
0     00083bcd  __error__                           
1     00000400  __stack                             
0     00085662  _args_main                          
0     00085533  _c_int00                            
1     0000b00e  _lock                               
0     00085681  _nop                                
0     0008567d  _register_lock                      
0     00085679  _register_unlock                    
0     00083fff  _system_post_cinit                  
0     0008569e  _system_pre_init                    
1     0000b010  _unlock                             
0     0008536d  abort                               
0     00083000  adcA1ISR_DS3                        
0     00080000  code_start                          
0     00083371  cpuTimer_Start_DSP_DCAC_PWMxx_ISR   
0     0008536f  exit                                
0     00083dce  initCLA                             
0     00083cea  initCMPSS                           
0     00083d31  initCMPSS_DSP_CP_DS3                
0     00083d0e  initCMPSS_DSP_CP_QT2                
0     00082f0f  initEPWM_forCMPSS_ACsideDsignal     
0     00082f73  initEPWM_forCMPSS_DSP_CP            
0     00082f8b  initEPWM_forValleySwitch            
0     00082e8f  initEPWM_trigADC                    
0     000839cb  initTimer_VAC_1stPWM                
0     000839f3  initTimer_VB_SENSE_StartDeadZone    
0     00082488  main                                
0     00085483  memcpy                              
0     00085691  memset                              
1     00008828  phase_VAC_A                         
1     0000b002  phase_VB_SENSE                      
0     00082de6  setup_CMPSS_trig_EPWM               
0     00082ee7  stopEPWM                            
1     0000afd2  toDel1                              
1     0000afd4  toDel2                              
1     0000afd6  toDel3                              
1     0000afd8  toDel4                              
1     0000afda  toDel5                              
1     0000afdc  toDel6                              
1     0000afde  toDel7                              
1     0000afe0  toDel8                              
1     0000afe2  toDel9                              
1     0000afe4  toDel_ADC_readResult                
1     0000afe5  toDel_AdcBufPtr                     


GLOBAL SYMBOLS: SORTED BY Symbol Address 

page  address   name                                
----  -------   ----                                
0     00008000  Cla1ProgRunStart                    
0     00008000  Cla1Task4                           
0     00008110  Cla1Task1                           
0     000081e0  Cla1Task2                           
0     000082b0  Cla1Task3                           
0     00008704  Cla1Task8                           
0     00009800  Cla1ConstRunStart                   
0     0000a000  Flash_initModule                    
0     0000a000  RamfuncsRunStart                    
0     0000a12c  SysCtl_delay                        
0     0000a130  RamfuncsRunEnd                      
0     00080000  code_start                          
0     00081000  RamfuncsLoadStart                   
0     00081130  RamfuncsLoadEnd                     
0     00081142  __TI_Handler_Table_Base             
0     00081148  __TI_Handler_Table_Limit            
0     00081154  __TI_CINIT_Base                     
0     00081168  __TI_CINIT_Limit                    
0     00082000  Cla1ConstLoadStart                  
0     00082488  main                                
0     00082de6  setup_CMPSS_trig_EPWM               
0     00082e8f  initEPWM_trigADC                    
0     00082ee7  stopEPWM                            
0     00082f0f  initEPWM_forCMPSS_ACsideDsignal     
0     00082f73  initEPWM_forCMPSS_DSP_CP            
0     00082f8b  initEPWM_forValleySwitch            
0     00082faf  SysCtl_getClock                     
0     00083000  adcA1ISR_DS3                        
0     00083371  cpuTimer_Start_DSP_DCAC_PWMxx_ISR   
0     00083405  EcapTimer_VB_SENSE_StartDeadZone_ISR
0     0008361a  InitAdcA_DS3                        
0     000839cb  initTimer_VAC_1stPWM                
0     000839f3  initTimer_VB_SENSE_StartDeadZone    
0     00083a80  Device_init                         
0     00083ae0  Device_enableAllPeripherals         
0     00083bbd  Device_initGPIO                     
0     00083bcd  __error__                           
0     00083cea  initCMPSS                           
0     00083d0e  initCMPSS_DSP_CP_QT2                
0     00083d31  initCMPSS_DSP_CP_DS3                
0     00083dce  initCLA                             
0     00083e4f  SysCtl_setClock                     
0     00083f05  SysCtl_isPLLValid                   
0     00083fa0  SysCtl_selectOscSource              
0     00083fff  _system_post_cinit                  
0     0008474c  Cla1ProgLoadStart                   
0     00085000  ADC_setVREF                         
0     000850ba  GPIO_setPadConfig                   
0     0008510c  Interrupt_initModule                
0     00085149  GPIO_setAnalogMode                  
0     00085184  MemCfg_setLSRAMMasterSel            
0     000851bc  GPIO_setPinConfig                   
0     000851f3  Interrupt_enable                    
0     0008525a  GPIO_setDirectionMode               
0     0008528b  __TI_decompress_lzss                
0     000852bc  XBAR_setEPWMMuxConfig               
0     000852ea  XBAR_setOutputMuxConfig             
0     00085318  __TI_auto_init_nobinit_nopinit      
0     00085343  __c28xabi_cmpd                      
0     0008536d  C$$EXIT                             
0     0008536d  abort                               
0     0008536f  exit                                
0     00085396  CLA_setTriggerSource                
0     000853e1  SysCtl_selectXTAL                   
0     00085427  Interrupt_initVectorTable           
0     00085483  memcpy                              
0     000854ba  SysCtl_getLowSpeedClock             
0     000854d4  SysCtl_selectXTALSingleEnded        
0     00085533  _c_int00                            
0     000855a2  EPWM_setEmulationMode               
0     000855b8  __c28xabi_ultod                     
0     00085662  _args_main                          
0     00085679  _register_unlock                    
0     0008567d  _register_lock                      
0     00085681  _nop                                
0     00085682  __TI_decompress_none                
0     00085691  memset                              
0     00085698  __TI_zero_init                      
0     0008569e  _system_pre_init                    
1     00000400  __stack                             
1     000007f8  __TI_STACK_END                      
1     00008810  Period_DSP_DCAC_PWMHA               
1     00008812  Period_DSP_DCAC_PWMLA               
1     00008814  Period_DSP_DCAC_PWM_LS_1            
1     00008816  Period_DSP_DCAC_PWM_HS_1            
1     00008818  EPWM1_CompareValue                  
1     0000881a  EPWM2_CompareValue                  
1     0000881c  EPWM5_CompareValue                  
1     0000881e  EPWM7_CompareValue                  
1     00008820  EPWM8_CompareValue                  
1     00008822  PhaseVB_SENSE                       
1     00008824  EPWM1_Compare                       
1     00008826  EPWM2_Compare                       
1     00008828  phase_VAC_A                         
1     0000a800  AdcBuf_VAC_A                        
1     0000afd2  toDel1                              
1     0000afd4  toDel2                              
1     0000afd6  toDel3                              
1     0000afd8  toDel4                              
1     0000afda  toDel5                              
1     0000afdc  toDel6                              
1     0000afde  toDel7                              
1     0000afe0  toDel8                              
1     0000afe2  toDel9                              
1     0000afe4  toDel_ADC_readResult                
1     0000afe5  toDel_AdcBufPtr                     
1     0000b002  phase_VB_SENSE                      
1     0000b004  Period_VB_SENSE                     
1     0000b008  __TI_enable_exit_profile_output     
1     0000b00a  __TI_cleanup_ptr                    
1     0000b00c  __TI_dtors_ptr                      
1     0000b00e  _lock                               
1     0000b010  _unlock                             
abs   00000088  Cla1ConstLoadSize                   
abs   00000130  RamfuncsLoadSize                    
abs   00000130  RamfuncsRunSize                     
abs   000003f8  __TI_STACK_SIZE                     
abs   0000070c  Cla1ProgLoadSize                    
abs   0000fd0a  CLAsincosTable                      
abs   0000fe4e  CLAsincosTable_TABLE_SIZEDivTwoPi   
abs   0000fe54  CLAsincosTable_Coef0                
abs   0000fe56  CLAsincosTable_Coef1                
abs   0000fe5a  CLAsincosTable_Coef2                
abs   0000fe5c  CLAsincosTable_Coef3                
abs   ffffffff  __TI_pprof_out_hndl                 
abs   ffffffff  __TI_prof_data_size                 
abs   ffffffff  __TI_prof_data_start                
n/a   UNDEFED   __c_args__                          

[128 symbols]

Rayna

over 5 years ago

0 Vamsi Gudivada over 5 years ago

TI__Guru* 87105 points

Rayna,

Did the application end up in ITRAP? Or is it executing fine with no EPWM output?

Is this observed with debugger connected or standalone? Is it working with debugger connected?

Thanks and regards,

Vamsi

0 Quentin Fu over 5 years ago in reply to Vamsi Gudivada

Intellectual 770 points

Hi Vamsi,

I did not see it ended up in ITRAP. The application is running standalone without debugger connected.

With exactly the same project code:

if changing Active Build Configuration to CPU1_RAM, it works fine with PWM waveforms generated as expected
if changing Active Build Configuration to CPU1_FLASH, there is no PWM waveform generated

very strange. Any idea what might be the cause and how to diagnose?

0 Vamsi Gudivada over 5 years ago in reply to Quentin Fu

TI__Guru* 87105 points

Xiaoquan,

1) Did you try to run the flash build configuration with debugger connected? Did it work like that?

2) Did you configure the boot mode pins correctly for flash boot?

3) Please search for "Could you list the procedure involved in modifying an application from RAM based configuration to Flash based configuration in simple steps?" in the flash wiki at https://processors.wiki.ti.com/index.php/C2000_Flash_FAQ#Flash_Linker_cmd_file and see whether your application is handling these steps correctly or not.

Thanks and regards,

Vamsi

0 Rayna Wang over 5 years ago in reply to Vamsi Gudivada

TI__Expert 3680 points

Hi Vamsi,

This issue is solved by changing --opt_level from off to 3.

However, We're confused about the reason, why "--opt_level = off", there's no EPWM output, while "--opt_level = 3", the EPWM output is normal?

Could you please help to explain it? Thanks!

Rayna

0 Vamsi Gudivada over 5 years ago in reply to Rayna Wang

TI__Guru* 87105 points

Rayna,

Thank you for the update. That is why I was asking whether the application worked fine or not in debugger connected mode. Answering this question would have helped us to understand whether or not it is an issue because of the project changes made to move from RAM build to flash build.

Regarding the optimization clearing the issue: Please note that Flash execution involves additional wait-states (unlike 0-wait RAM). Hence, the rate at which the interrupts (and hence the remaining code) work may change based on the priority of the interrupts. Ex: If the high priority interrupts take more time due to additional wait-states, CPU may not get to low priority interrupts and other code quickly. Optimizing the code can impact this as it can reduce the overall cycles it takes to execute the high priority interrupts. Hence, it worked in this case.

Please suggest to map ISRs to RAM (using .TI.ramfunc) and see if that helps.

Thanks and regards,
Vamsi

0 Rayna Wang over 5 years ago in reply to Vamsi Gudivada

TI__Expert 3680 points

Hi Vamsi,

Thanks for your explanation. And it's very helpful.

However, I have a few confusions as below,

What the difference of working or not in debugger connected mode with flash build, and what the usage of this information? For this case, both these two modes could not output EPWM before.
By the way, which optimization level could suggest to customer to have better performance?

Thanks!

Rayna

0 Vamsi Gudivada over 5 years ago in reply to Rayna Wang

TI__Guru* 87105 points

Rayna,

If the application works fine in debugger mode and not in standalone mode, it can be for different reasons:

1) Something is mapped to RAM (this always does not show up looking at linker cmd - Ex: If you have some section that is not mapped at all in linker cmd, you may get a warning during compile that some sections are allocated to available memory since they have not been allocated in the linker cmd to any memory)

2) User did not do some configuration correctly. Ex: Watchdog is not serviced correctly. Gel file disables the watchdog in debugger case. In standalone, it will be enabled as it is default.

etc.

Hence, it is important for us to rule out these issues and hence we need to know whether application ran successfully or not with debugger.

Regarding optimization question: Please open a new thread and corresponding experts will help you.

Thanks and regards,
Vamsi

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F280049C: No EPWM output if change CMD file from RAM to Flash