TMS320F28388D: Reading from SPI Slave using FIFO buffer

Hi,

I have SPI slave device that I am trying to communicate from using C28 CPU1 core of TMS320F28388D. 

I have set it up in a FIFO mode without any interrupt and I will be communicating with my slave chip using polling method. 

To read slave device, on first byte i have to send address and in 2nd byte (0x0 on tx), the slave transmits data. 

    uint16_t temp = ((reg_cfg->ADDR1 << 8) & 0xFF00);
    SPI_svdm_data_xfer(1, &temp, NULL);
    SPI_svdm_data_xfer(1, NULL, rx_data);

int SPI_svdm_data_xfer(uint16_t byte_length, const void *tx, void *rx)
{
    // for debugging, make sure that data transfer length is 1
    ASSERT(byte_length == 1);


    if (rx != NULL)
    {
        SPI_writeDataBlockingFIFO(SPI_SVDM_BASE, 0x0);
        DEVICE_DELAY_US(10);

        while (SPI_getRxFIFOStatus(SPI_SVDM_BASE) != SPI_FIFO_RXEMPTY)
        {
            *(uint8_t*) rx = SPI_readDataBlockingFIFO(SPI_SVDM_BASE) & 0x00FF;

        }

        return 1;
    }
    else if (tx != NULL)
    {
        SPI_writeDataBlockingFIFO(SPI_SVDM_BASE, (*(uint16_t*) tx));
        return 1;

    }
    return 0;
}

I have attached the code I am using. 

Currently I use DEVICE_DELAY_US(10); to make sure my transmission is finished before reading from the FIFO buffer.

However is there is any better way to read from FIFO like this?

Previously I was waiting for TX fifo to be empty and then reading the RX fifo buffer but that was giving unexpected results (It would show fifo is empty but then when I try to read another data. I think it was just taking longer for data to show up on FIFO RX) 

Thanks,

Swapnil