CCS/TMS320F280041C: CMPSS with PGA input problem

void initPGA(void)
{
 PGA_setGain(PGA1_BASE, PGA_GAIN_3);
    PGA_setFilterResistor(PGA1_BASE, PGA_LOW_PASS_FILTER_DISABLED);
    PGA_enable(PGA1_BASE);
}

void initADCs(void)
{
    //
    // Setup VREF as internal
    //
    ADC_setVREF(ADCA_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    ADC_setVREF(ADCB_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    ADC_setVREF(ADCC_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    //
    // Set ADCCLK divider to /4
    //
    ADC_setPrescaler(ADCA_BASE, ADC_CLK_DIV_4_0);
    ADC_setPrescaler(ADCB_BASE, ADC_CLK_DIV_4_0);
    ADC_setPrescaler(ADCC_BASE, ADC_CLK_DIV_4_0);
    //
    // Set pulse positions to late
    //
    ADC_setInterruptPulseMode(ADCA_BASE, ADC_PULSE_END_OF_CONV);
    ADC_setInterruptPulseMode(ADCB_BASE, ADC_PULSE_END_OF_CONV);
    ADC_setInterruptPulseMode(ADCC_BASE, ADC_PULSE_END_OF_CONV);

    //
    // Power up the ADCs and then delay for 1 ms
    //
    ADC_enableConverter(ADCA_BASE);
    ADC_enableConverter(ADCB_BASE);
    ADC_enableConverter(ADCC_BASE);
    DEVICE_DELAY_US(1000);
}

void initCMPSS(void)
{
    init_CMPSS_Modul(CMPSS1_BASE);
}

void init_CMPSS_Modul(uint32_t sellectedModul)
{
    //
        // Enable CMPSS and configure the negative input signal to come from
        // the DAC
        //
        CMPSS_enableModule(sellectedModul);
        CMPSS_configHighComparator(sellectedModul, CMPSS_INSRC_DAC);
        CMPSS_configLowComparator(sellectedModul, CMPSS_INSRC_DAC);


        //
        // Use VDDA as the reference for the DAC and set DAC value to midpoint for
        // arbitrary reference.
        //
        CMPSS_configDAC(sellectedModul, CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);

        CMPSS_setDACValueHigh(sellectedModul, CMPSS_HighValue);

        CMPSS_setDACValueLow(sellectedModul, CMPSS_LowValue);

        //
        // Configure digital filter. For this example, the maxiumum values will be
        // used for the clock prescale, sample window size, and threshold.
        //

        CMPSS_configFilterHigh(sellectedModul, 0x3FF, 32, 31);

        CMPSS_configFilterLow(sellectedModul, 0x3FF, 32, 31);

        //
        // Initialize the filter logic and start filtering
        //
        CMPSS_initFilterHigh(sellectedModul);

        CMPSS_initFilterLow(sellectedModul);

        //
        // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
        // the filter output.
        //
        CMPSS_configOutputsHigh(sellectedModul, CMPSS_TRIP_FILTER |
                                             CMPSS_TRIPOUT_FILTER);

        CMPSS_configOutputsLow(sellectedModul, CMPSS_TRIP_FILTER |
                                             CMPSS_TRIPOUT_FILTER);

}