• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 82 subscribers
  • Views 525 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379D: Both timers of cpu1 and cpu2 sychronisation

Gp
Intellectual 695 points
Part Number: TMS320F28379D

I have the following things to clarify.

1. I followed the following way to synchronize each cpu's own timer0 interrupt come at same time. To achieve this, I understood that I should make the two timers should start at same time but the below one I followed which doesn't make those timers synchronized. Is there anything else that should I follow? or If there is another way kindly give me suggestion. 

2. Does This kind of synchronization only synchronize IPC interrupts of both CPU or It synchronizes the operation of CPU1 and CPU2?

CPU 1 :

void main()
{

    while (IpcRegs.IPCSTS.bit.IPC17 == 0);
    IpcRegs.IPCACK.bit.IPC17 = 1;
    
    CpuTimer0Regs.TCR.bit.TSS   = 0;   // I am making timer0 to start as soon as giving acknowledgement to CPU2
    asm(" CLRC INTM, DBGM");           // Then I am enabling necessary interrupts
    

}

CPU 2 :

void main()
{
    IpcRegs.IPCSET.bit.IPC17    = 1;       
    CpuTimer0Regs.TCR.bit.TSS   = 0;  // CPU2 timer0 enabling as soon as starting cpu1
}

  • 0
    TI__Mastermind 23320 points

    Hi Ganeshapandi,

    I don't see anything wrong with the configuration you provided above for IpcRegs. How are the timers unsynchronized? Is Timer 0 for CPU1 ahead of Timer 0 for CPU2? Please ensure that you are not modifying the TSS bit somewhere prior in the code. Our examples usually configure this bit by writing to the entire TCR register so make sure this is not the case when you are configuring your timers.

    The method you provided above will synchronize the start of the two timers (Timer 0 on CPU1 and Timer 0 on CPU2) and if they have the same period the interrupts will come at the same time.

    Best Regards,

    Marlyn