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TMS320F2811: Use of Address-Bit Multiprocessor Mode in the Serial Communication Interface

Ashley Scott
Prodigy 210 points
Part Number: TMS320F2811

The SPRU051D document describes the Address-Bit Multiprocessor mode where frames have an extra bit called an address bit. The address bit is set to 1 in the first frame of the block and 0 in all other frames.

Is it possible to implement this mode while using the receive and transmit FIFOs for the SCI?

  • 0
    TI__Genius 17315 points

    Ashley,

    Address-bit mode (and idle-line mode) are independent of the enhanced FIFO feature.  The purpose of the FIFOs is to reduce servicing overhead.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken

  • 0 in reply to Ken Schachter
    TI__Genius 17315 points

    Ashley,

    It's been a while since I have heard from you last. Therefore, I am assuming that my last reply resolved your issue and I will close this thread. If this isn’t the case, please reject this resolution or reply to this thread. If this thread locks, please make a new thread describing the current status of your issue. Thank you.

    - Ken