Has there been an update to the 49c lanuch pad PDF ( tSPRUII7A–June 2018–Revised March 2019) to properly indicate booster header pins J6 GPIO pins 14/32, respective EPWM-8A/B? Where is EPWM-7A/B on J6, hal.c has two EPWM8B GPIO noted?
Also there are no PWM-DAC4 GPIO output pin/s defined in SDK 3.01.00.00 hal.c.
So EPWM-8B is configured for GPIO pin 15 but booster header pin map card and schematic both show pin 32, very confusing.