TMS320F28030: Power down sequence

Per datasheet, GPIO19, GPIO34-38 do not have glitch-free I/Os. Not sure if these are the I/Os you are referring to. You have not attached a scope shot to depict exactly what you mean by "glitching" and how it affects components downstream.

Hello all the GPIO are connected to down stream logic, when the power is turn off. the micro resets causing the all the GPIO to go high. resulting in the down stream logic to pulse

Per datasheet, GPIO19, GPIO34-38 do not have glitch-free I/Os. Not sure if these are the I/Os you are referring to. You have not attached a scope shot to depict exactly what you mean by "glitching" and how it affects components downstream.
where is this found in the data sheet

would disabling the BOR help

Please see section 5.12 in page 32 of SPRS584M. 

After reset, all GPIO pins are inputs. One option would be to reconfigure GPIOs to inputs before powering off. Please attach a scope shot that clearly shows the following signals during power-off: 1.8v, 3.3v, -XRS, a GPIO pin that exhibits the problem.

Hello,  a TLV803SDBZT  is connected to the Xrst. Would the addition of pull down resistor on the GPIO help  when the GPIO are high Z?

do the GPIO have internal pull-down?

thanks