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SRAM 1Bit ECC Test Failure

Guy Tadi
Intellectual 660 points
Part Number: RM48L940

My SRAM_ECC_1BIT_FAULT_INJECTION test is failing because this condition evaluates to false:

(((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))
                                == (sl_esmREG->SR1[0] & ((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))))

This makes the condition below to check if the single bit errors have been generated for both banks also false and hence ST_FAIL. How do I find out what the problem is?

                /* Check if the single bit errors have been generated for both banks */
                if ((TCRAM_RAMERRSTATUS_ADDR_SERR == (uint32)(sl_tcram1REG->RAMERRSTATUS & TCRAM_RAMERRSTATUS_ADDR_SERR))
                        /*SAFETYMCUSW 96 S MR: 6.2,10.1,10.2,12.1,12.6 <APPROVED> Comment_25*/
                        && ((TCRAM_RAMERRSTATUS_ADDR_SERR == (uint32)(sl_tcram2REG->RAMERRSTATUS & TCRAM_RAMERRSTATUS_ADDR_SERR)))
                        && (((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))
                                == (sl_esmREG->SR1[0] & ((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))))){

                    if( ((SRAM_ECC_ERROR_FORCING_1BIT==testType) &&
                            (sl_tcram2REG->RAMSERRADDR == ((uint32)&sramEccTestBuff[1] & ((uint32)0x0003FFFFU)))) || (SRAM_ECC_ERROR_PROFILING==testType)) {
                        *sram_stResult = ST_PASS;
                    }else{
                        *sram_stResult = ST_FAIL;
                    }
                    sl_tcram1REG->RAMOCCUR = 0x00000000u;
                    sl_tcram2REG->RAMOCCUR = 0x00000000u;
                } else {
                    *sram_stResult = ST_FAIL;
                }

  • 0
    TI__Prodigy 620 points
    Hello,

    I need to do a test and will get back to you on this.

    Thanks,
    Akshay
  • 0 in reply to Akshay Manikantan
    Intellectual 660 points
    Hi Akshay,
    I'm following up to see if you have any result from your test. Thanks.
  • 0
    TI__Prodigy 620 points

    Hello,

    For SRAM_ECC_1BIT_FAULT_INJECTION please refer to the following code snippet in the esm_application_callback.c on how the Fault Injection is being handled.

            else if((ESM_GRP1_MASK == ((grp_channel&ESM_GRP1_MASK)))&&(ESM_G1ERR_B0TCM_CORRERR == (grp_channel & 0x0000ffff)))
	{
		callbkParam1 = param1;
		/* clear nError PIN and esm flags */
		sl_esmREG->SR1[0] |= GET_ESM_BIT_NUM(ESM_G1ERR_B0TCM_CORRERR);
		BIT_SET(sl_tcram1REG->RAMERRSTATUS,TCRAM_RAMERRSTATUS_ADDR_SERR);/* Clear for subsequent operation */
		BIT_SET(sl_tcram2REG->RAMERRSTATUS,TCRAM_RAMERRSTATUS_ADDR_SERR);
		_SL_HoldNClear_nError();
		sram_1bit_prof_faultinject_callback = TRUE;
	}
	else if((ESM_GRP1_MASK == ((grp_channel&ESM_GRP1_MASK)))&&(ESM_G1ERR_B1TCM_CORRERR == (grp_channel & 0x0000ffff)))
	{
		callbkParam4 = param1;
		sl_esmREG->SR1[0] |= GET_ESM_BIT_NUM(ESM_G1ERR_B1TCM_CORRERR);
		BIT_SET(sl_tcram1REG->RAMERRSTATUS,TCRAM_RAMERRSTATUS_ADDR_SERR);/* Clear for subsequent operation */
		BIT_SET(sl_tcram2REG->RAMERRSTATUS,TCRAM_RAMERRSTATUS_ADDR_SERR);
		_SL_HoldNClear_nError();
		sram_1bit_prof_faultinject_callback = TRUE;
	}

    Guy Tadi said:

    ?

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    (((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))
                                    == (sl_esmREG->SR1[0] & ((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))))

    ?

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    /* Check if the single bit errors have been generated for both banks */
    if ((TCRAM_RAMERRSTATUS_ADDR_SERR == (uint32)(sl_tcram1REG->RAMERRSTATUS & TCRAM_RAMERRSTATUS_ADDR_SERR))
            /*SAFETYMCUSW 96 S MR: 6.2,10.1,10.2,12.1,12.6 <APPROVED> Comment_25*/
            && ((TCRAM_RAMERRSTATUS_ADDR_SERR == (uint32)(sl_tcram2REG->RAMERRSTATUS & TCRAM_RAMERRSTATUS_ADDR_SERR)))
            && (((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))
                    == (sl_esmREG->SR1[0] & ((uint32)(1u << ESM_G1ERR_B0TCM_CORRERR) | (uint32)(1u << ESM_G1ERR_B1TCM_CORRERR))))){
     
        if( ((SRAM_ECC_ERROR_FORCING_1BIT==testType) &&
                (sl_tcram2REG->RAMSERRADDR == ((uint32)&sramEccTestBuff[1] & ((uint32)0x0003FFFFU)))) || (SRAM_ECC_ERROR_PROFILING==testType)) {
            *sram_stResult = ST_PASS;
        }else{
            *sram_stResult = ST_FAIL;
        }
        sl_tcram1REG->RAMOCCUR = 0x00000000u;
        sl_tcram2REG->RAMOCCUR = 0x00000000u;
    } else {
        *sram_stResult = ST_FAIL;
    }

    Also the code snippets mentioned in the initial post will not be executed for SRAM_ECC_1BIT_FAULT_INJECTION as the below condition results in a FALSE

     if(!((SRAM_ECC_1BIT_FAULT_INJECTION== testType) || (SRAM_ECC_ERROR_PROFILING_FAULT_INJECT == testType)))

    We have verified the correct working of the SRAM_ECC_1BIT_FAULT_INJECTION test with the demo application.

    Thanks,

    Akshay