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LAUNCHXL2-RM57L: MIBSPI Slave mode

Part Number: LAUNCHXL2-RM57L
Other Parts Discussed in Thread: HALCOGEN

Hello,

I've been attempting to hook an SPI master device to the LAUNCHXL2-RM57L and read data and so far I'm getting only zeros.

The setup is simple, the master is only sending data at about 12.5mHz , the slave (Hercules) only recurring, never sending any data.

The data is short messages of 12 uint16_t at a time ,following is a logic capture of  the signal characteristics.

The master is currently hooked to MIBSPI3 (I've tested MIBSPI0 as well) like so:

To make the thing work, all I did is create simple project using HAL CoGen, enabled MIBSPI3, select it in the MUX page (where oddly enough I god a conflict, and added a VERY simple code that attempts to read.

/* USER CODE END */
static int i = 0;
uint16_t RX_Data[20] = { 0 }; // We're only receiving

void _main(void)
{
/* USER CODE BEGIN (3) */


    mibspiInit();

    while(true)
    {
        mibspiGetData(mibspiREG3, 0, &RX_Data[0]);
        if(RX_Data[0] != 0)
        {
            i++; // Never getting to this point
            i--;

        }
    }
}

Please advise,
Thanks you,
Eitan.

6036.Code.zip

  • Hello ??

     Is there anybody out there ?

  • I assume that you have selected CLK, SIMO, SOMI and CS to be SPI functional signals in HALCoGen. Please check the clock phase and polarity settings. These could have different implementations from part to part. Which part is the SPI master?

    Regards, Sunil

  • 1. Does My code looks right? assuming I need only to be a listening slave ?

    2. Is there anything I need to beside of  Enabling MIBSPI3 on the PINMUX tab in HalCoGen ?

  • You do need to configure the MibSPI terminals as functional pins. They are configured as general-purpose I/Os by default. Refer to this post for an example for master and slave implementations using MibSPIx. It is on another part. You can configure your HALCoGen project using this example as reference.

  • I did :(

    Could you please go through my (extremely simple) project and see what I got wrong there ?It's a straight forward HALCoGen generated project, I've added "my_main.c" that simply calls 'mibspiInit()' and then looping forever and calling 'mibspiGetData()'

    I'm attempting to configure the LAUNCHXL2-RM57L to be an SPI slave that DOES NOT and any data and just picks whatever the master sends.

    SPI Setup: CS active low, CPHA = 0, CPOL = 0, 16 bits per transfer.

    The master is hooked to MIBSPI3 on the board as shown in my previous message.

    Data is arriving in junks of 24 bytes (12 shorts) .

    Thnks,

    Eitan Michaelson,8551.spi.zip

    SolarEdge.



  • I see that you have configured the ENA signal as a SPI-functional signal. This is driven by the slave when it is ready to respond to the master driving the chip select low. Is this being driven by the RM57? Does the master in your system actually wait for the nENA to be driven low before sending the clocks?

  • The master does not wait, it simply sets the CS to 0, writes 24 bytes and then resets the CS  to 1 .

    The slave should start reading when the CS goes low.

  • Please configure the ENA signal as a general-purpose I/O and not a SPI-functional signal.

    Also, the master keeps the chip-select active during the 12 transfers. Please enable the CSHOLD (chip-select hold) mode for the transfer group 0 on MibSPI3.

    Regards, Sunil

  • Hello,

    Finlay the issue was resolved however, I'm not as to why ..

    Following are the steps I tool to make this work:

    1. The call mibspiTransfer()  was missing, so the transfer was not started. (obvious reason)

    2. Setting SCS(0) as  GPIO input and pull-up as shown here :

    I'm attaching the the test code that now appears to work flawlessly .

    1. I'd like to know why my code started to run after this modification (SCS0).

    2. I need a sample that does the same but instead of polling a status register triggers a DMA interrupt , so I would be able to receive large chunks of data

    using DMA and double buffer management.

    Thanks!

    0216.spi.zip

  • Hi Eitan,

    Configuring nCS0 as a general-purpose I/O would essentially add a longer delay between driving nCS0 low and starting the SPI transmit clock. This is one of the suggestions I also had - that is, to increase the delay between driving nCS0 and starting the CLK. An alternative would be to use a full hardware-handshake mode, where the master drives nCS low and then waits for the slave to drive nENA low before starting the transfer.

    HALCoGen includes an example of using MibSPI with DMA. You can modify the setup to create a double-buffer scheme where the SPI data is received into two separate groups of RX buffers, and then the DMA transfer can happen while the next set of data is being received.  In between transfers, you do need to be able to switch the buffer number where the next transfer group data will be stored. This can be done by using another GPIO as a hardware-handshake mechanism.

    Regards, Sunil

  • Thanks!

    Found 'xample_mibspiDma.c inside the HALCoGen examples directory.

    However file has references to .jpg images that I could nor find..

    For example "@image html mibspidma1.jpg "Figure: MibSPi Configuration" where the actual image 'mibspidma1.jpg' is missing from the HALcoGen install directory.

    What am I missing ?

  • View the help files from within HALCoGen.

    Go to Help --> Help Topics

    Open the "Examples" section under the "Contents" window and click on the example_mibspiDMA.c file. You should be able to see the relevant images in the window on the right.

  • Thanks,

    I went through the example (now with the missing images), however, the example appears to explain a simple loopback case, while it's better than nothing,

    I wish I could have an example that go through a slave transfer that when done triggers a DMA interrupt ( or notification ?).

    How do I instruct the DMA to trigger my code when the buffer is full / half full ?

    Thnks,

    Eitan