Kindly can you provide me with the Erase speed of internal flash memory in MB/S or in Mb/S for TMS570LS3137?
I appreciate your fast response.
Thanks
Ahmed Sabry
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Kindly can you provide me with the Erase speed of internal flash memory in MB/S or in Mb/S for TMS570LS3137?
I appreciate your fast response.
Thanks
Ahmed Sabry
The following sections in the TMS570LS3137 datasheet provide the nominal and maximum Sector/Bank erase times:
Using the times for each sector/bank and the sizes, you should be able to calculate the erase speed.
Thank you for your reply.
But just need to confirm results
by following 6.10.5 for program flash Erase Speed will be 144bit for TMS570LS3137-ZWT will be 3072KB/4s= 768KB/s
and for data flash 6.10.6 Erase Speed will be 64KB/8s =8KB
This will be ok?
Appreciate your confirmation
Are you interested in the speed of erasing the entire flash, or a sector at a time?Ahmed Sabry1 said:But just need to confirm results
Erasing all sectors in one bank takes the same time as erasing just one sector.
The program flash contains two banks each of size 1.5MB, where the number and size of sectors differs between BANK0 and BANK1.Ahmed Sabry1 said:by following 6.10.5 for program flash Erase Speed will be 144bit for TMS570LS3137-ZWT will be 3072KB/4s= 768KB/s
Figure 3. Recommended Bank Erase Flow in the F021 Flash API Version Reference Guide shows that the erase of one bank must complete before can start to erase the other bank.
Therefore, to erase both banks of the program flash the worst case erase speed would be 3072KB/(4+4)s = 384KB/s.
Thank you for your support, but How can I calculate the read speed?
Appreciate your help.
The TCM flash support zero address and data wait states upto a CPU speed of 50MHz in nonpipelined mode. The flash supports a maximum CPU clock speed of 180 MHz with one address wait state and three data wait states.
Thank you for your reply, But I still need more clarification on how to calculate the read speed of the flash memory.
Hello Ahmed,
It depends on how to read the memory. I did a test, it takes around 100 cycles to read 40 32-bit words from the flash using LDM instruction. The CPU clock is 160MHz, and data wait state is 3, address wait state is 1.