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MSP430FR6820: BOR reset threshold and operation

Part Number: MSP430FR6820

I need clarification on the operation of the BOR reset circuitry and trigger thresholds in the MSP430FR6820.

Table 5-1 in section 5.13.1 Power Supply Sequencing in the datasheet states Min and Max values for V_VCC_BOR- and V_VCC_BOR+.

V_VCC_BOR- min = 0.73; V_VCC_BOR- max = 1.66

V_VCC_BOR+ min = 0.79; V_VCC_BOR+ max = 1.68

From this description can I assume that the BOR circuit guarantee activating reset if Vcc < 0.73 and guarantee deactivating reset if Vcc > 1.68?

Are there published typical values associated with V_VCC_BOR- and V_VCC_BOR+ along with tolerances (for example V_VCC_BOR- = 1.195 +/-20%)?

Are the contents of SRAM guaranteed to be valid when Vcc > V_VCC_BOR-? (of course, assuming the Absolute Maximum Ratings are met)

  • Hi Jon

    >> From this description can I assume that the BOR circuit guarantee activating reset if Vcc < 0.73 and guarantee deactivating reset if Vcc > 1.68?

    BOR reset status happens from 0.79V to 1.68V during the power-up process. BOR reset can be garanteed completed when Vcc is higher than 1.68V in this case

    BOR reset status happens from 1.66V to 0.73V during the power-down process. BOR reset can be garanteed completed when Vcc is lower than 0.73V in this case

    >> Are there published typical values associated with V_VCC_BOR- and V_VCC_BOR+ along with tolerances (for example V_VCC_BOR- = 1.195 +/-20%)?

    There is no tolerances. I think the tolerance is included.

    >> Are the contents of SRAM guaranteed to be valid when Vcc > V_VCC_BOR-? (of course, assuming the Absolute Maximum Ratings are met)

    No. I think the contents of SRAM is guaranteed valid when Vcc > V_VCC_BOR+ (1.66V) during the power-down process

    Thanks

  • I believe in communicating with Jon that this can be closed now.

    Jon, please comment if otherwise.

    Thanks all,
    Chris

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